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https://github.com/AsahiLinux/u-boot
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bf29e0ea0a
Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC values. This fixes the occasional 440SPe hard locking issues when the 440SPe's dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver). Previously the appropriate initialization had been made in Linux, by the ppc440spe ADMA driver, which is wrong because modifying the MQ configuration registers after normal operation has begun is not supported and could have unpredictable results. Comment from Stefan: This patch doesn't change the resulting value of the MQ registers. It explicitly sets/clears all bits to the desired state which better documents the resulting register value instead of relying on pre-set default values. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Stefan Roese <sr@denx.de> |
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| .. | ||
| 4xx_pci.h | ||
| 4xx_pcie.h | ||
| 5xx_immap.h | ||
| 8xx_immap.h | ||
| atomic.h | ||
| bitops.h | ||
| byteorder.h | ||
| cache.h | ||
| cpm_85xx.h | ||
| cpm_8260.h | ||
| e300.h | ||
| errno.h | ||
| fsl_ddr_sdram.h | ||
| fsl_i2c.h | ||
| fsl_law.h | ||
| fsl_lbc.h | ||
| fsl_serdes.h | ||
| global_data.h | ||
| gpio.h | ||
| immap_83xx.h | ||
| immap_85xx.h | ||
| immap_86xx.h | ||
| immap_512x.h | ||
| immap_8220.h | ||
| immap_8260.h | ||
| immap_fsl_pci.h | ||
| immap_qe.h | ||
| interrupt.h | ||
| io.h | ||
| iopin_8xx.h | ||
| iopin_85xx.h | ||
| iopin_8260.h | ||
| m8260_pci.h | ||
| mc146818rtc.h | ||
| mmu.h | ||
| mpc8xxx_spi.h | ||
| mpc8349_pci.h | ||
| pci_io.h | ||
| pnp.h | ||
| posix_types.h | ||
| ppc4xx-ebc.h | ||
| ppc4xx-sdram.h | ||
| ppc4xx-uic.h | ||
| processor.h | ||
| ptrace.h | ||
| residual.h | ||
| sigcontext.h | ||
| signal.h | ||
| status_led.h | ||
| string.h | ||
| types.h | ||
| u-boot.h | ||
| xilinx_irq.h | ||