mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
f7c28aa7ce
B4860, B4440, B4420 and B4220 have MAPLE, so enable law creation for them only. Remove static LAW creation for MAPLE. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
29 lines
856 B
C
29 lines
856 B
C
/*
|
|
* Copyright 2011-2012 Freescale Semiconductor, Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/fsl_law.h>
|
|
#include <asm/mmu.h>
|
|
|
|
struct law_entry law_table[] = {
|
|
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
|
|
#ifdef CONFIG_SYS_BMAN_MEM_PHYS
|
|
SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
|
|
#endif
|
|
#ifdef CONFIG_SYS_QMAN_MEM_PHYS
|
|
SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
|
|
#endif
|
|
SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
|
|
#ifdef CONFIG_SYS_DCSRBAR_PHYS
|
|
/* Limit DCSR to 32M to access NPC Trace Buffer */
|
|
SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
|
|
#endif
|
|
#ifdef CONFIG_SYS_NAND_BASE_PHYS
|
|
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
|
|
#endif
|
|
};
|
|
|
|
int num_law_entries = ARRAY_SIZE(law_table);
|