mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-25 12:33:41 +00:00
86cf1c8285
We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com>
27 lines
826 B
C
27 lines
826 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
|
*/
|
|
#ifndef __CONFIG_RV1108_COMMON_H
|
|
#define __CONFIG_RV1108_COMMON_H
|
|
|
|
#include <asm/arch/hardware.h>
|
|
#include "rockchip-common.h"
|
|
|
|
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
|
|
#define CONFIG_SYS_CBSIZE 1024
|
|
#define CONFIG_SKIP_LOWLEVEL_INIT
|
|
|
|
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
|
|
/* TIMER1,initialized by ddr initialize code */
|
|
#define CONFIG_SYS_TIMER_BASE 0x10350020
|
|
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
|
|
|
|
#define CONFIG_SYS_SDRAM_BASE 0x60000000
|
|
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
|
|
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000)
|
|
|
|
/* rockchip ohci host driver */
|
|
#define CONFIG_USB_OHCI_NEW
|
|
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
|
|
#endif
|