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https://github.com/AsahiLinux/u-boot
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1351cd3b4b
The existence of devices should be checked in the bind method and not in
the probe method. Adjust the RISC-V Zkr RNG driver accordingly.
Use ENOENT (and not ENODEV) to signal that the device is not available.
Fixes: ceec977ba1 ("rng: Provide a RNG based on the RISC-V Zkr ISA extension")
Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
134 lines
2.5 KiB
C
134 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* The RISC-V Zkr extension provides CSR seed which provides access to a
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* random number generator.
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*/
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#define LOG_CATEGORY UCLASS_RNG
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#include <dm.h>
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#include <interrupt.h>
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#include <log.h>
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#include <rng.h>
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#define DRIVER_NAME "riscv_zkr"
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enum opst {
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/** @BIST: built in self test running */
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BIST = 0b00,
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/** @WAIT: sufficient amount of entropy is not yet available */
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WAIT = 0b01,
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/** @ES16: 16bits of entropy available */
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ES16 = 0b10,
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/** @DEAD: unrecoverable self-test error */
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DEAD = 0b11,
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};
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static unsigned long read_seed(void)
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{
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unsigned long ret;
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__asm__ __volatile__("csrrw %0, seed, x0" : "=r" (ret) : : "memory");
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return ret;
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}
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static int riscv_zkr_read(struct udevice *dev, void *data, size_t len)
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{
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u8 *ptr = data;
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while (len) {
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u32 val;
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val = read_seed();
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switch (val >> 30) {
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case BIST:
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continue;
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case WAIT:
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continue;
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case ES16:
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*ptr++ = val & 0xff;
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if (--len) {
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*ptr++ = val >> 8;
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--len;
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}
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break;
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case DEAD:
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return -ENOENT;
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}
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}
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return 0;
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}
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/**
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* riscv_zkr_bind() - check if the seed register is available
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*
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* If the SBI software has not set mseccfg.sseed=1 or the Zkr extension is not
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* available, reading the seed register will result in an exception from which
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* this function safely resumes.
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*
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* @dev: RNG device
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* Return: 0 if successfully probed
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*/
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static int riscv_zkr_bind(struct udevice *dev)
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{
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struct resume_data resume;
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int ret;
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u32 val;
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/* Check if reading seed leads to interrupt */
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set_resume(&resume);
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ret = setjmp(resume.jump);
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if (ret)
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log_debug("Exception %ld reading seed CSR\n", resume.code);
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else
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val = read_seed();
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set_resume(NULL);
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if (ret)
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return -ENOENT;
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return 0;
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}
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/**
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* riscv_zkr_probe() - check if entropy is available
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*
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* The bind method already checked that the seed register can be read without
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* excpetiong. Here we wait for the self test to finish and entropy becoming
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* available.
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*
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* @dev: RNG device
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* Return: 0 if successfully probed
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*/
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static int riscv_zkr_probe(struct udevice *dev)
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{
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u32 val;
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do {
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val = read_seed();
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val >>= 30;
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} while (val == BIST || val == WAIT);
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if (val == DEAD)
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return -ENOENT;
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return 0;
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}
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static const struct dm_rng_ops riscv_zkr_ops = {
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.read = riscv_zkr_read,
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};
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U_BOOT_DRIVER(riscv_zkr) = {
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.name = DRIVER_NAME,
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.id = UCLASS_RNG,
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.ops = &riscv_zkr_ops,
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.bind = riscv_zkr_bind,
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.probe = riscv_zkr_probe,
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};
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U_BOOT_DRVINFO(cpu_riscv_zkr) = {
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.name = DRIVER_NAME,
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};
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