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cb0cb1b0cf
Add USB clock driver to configure the input clock and the divider in the PMC_USB register to generate a 48MHz and a 12MHz signal to the USB Host OHCI. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
56 lines
1.9 KiB
Text
56 lines
1.9 KiB
Text
config CLK_AT91
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bool "AT91 clock drivers"
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depends on CLK
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select MISC
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help
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This option is used to enable the AT91 clock driver.
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The driver supports the AT91 clock generator, including
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the oscillators and PLLs, such as main clock, slow clock,
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PLLA, UTMI PLL. Clocks can also be a source clock of other
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clocks a tree structure, such as master clock, usb device
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clock, matrix clock and generic clock.
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Devices can use a common clock API to request a particular
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clock, enable it and get its rate.
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config AT91_UTMI
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bool "Support UTMI PLL Clock"
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depends on CLK_AT91
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select REGMAP
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select SPL_REGMAP if SPL_DM
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select SYSCON
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select SPL_SYSCON if SPL_DM
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help
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This option is used to enable the AT91 UTMI PLL clock
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driver. It is the clock provider of USB, and UPLLCK is the
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output of 480 MHz UTMI PLL, The souce clock of the UTMI
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PLL is the main clock, so the main clock must select the
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fast crystal oscillator to meet the frequency accuracy
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required by USB.
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config AT91_USB_CLK
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bool "Support USB OHCI Input Clock"
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depends on CLK_AT91
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help
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This option is used to enable the USB Input Clock, from
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the device tree, configure the USBS bit (PLLA or UTMI PLL)
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and USBDIV field of the PMC_USB register.
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config AT91_H32MX
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bool "Support H32MX 32-bit Matrix Clock"
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depends on CLK_AT91
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help
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This option is used to enable the AT91 H32MX matrixes
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clock driver. There are H64MX and H32MX matrixes clocks,
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H64MX 64-bit matrix clocks are MCK. The H32MX 32-bit
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matrix clock is to be configured as MCK if MCK does not
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exceed 83 MHz, else it is to be configured as MCK/2.
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config AT91_GENERIC_CLK
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bool "Support Generic Clock"
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depends on CLK_AT91
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help
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This option is used to enable the AT91 generic clock
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driver. Some peripherals may need a second clock source
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that may be different from the system clock. This second
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clock is the generic clock (GCLK) and is managed by
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the PMC via PMC_PCR register.
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