mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
74 lines
1.5 KiB
C
74 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include "vct.h"
|
|
|
|
/*
|
|
* Find out to which of the 2 gpio modules the pin specified in the
|
|
* argument belongs:
|
|
* GPIO_MODULE yields 0 for pins 0 to 31,
|
|
* 1 for pins 32 to 63
|
|
*/
|
|
#define GPIO_MODULE(pin) ((pin) >> 5)
|
|
|
|
/*
|
|
* Bit position within a 32-bit peripheral register (where every
|
|
* bit is one bitslice)
|
|
*/
|
|
#define MASK(pin) (1 << ((pin) & 0x1F))
|
|
#define BASE_ADDR(mod) module_base[mod]
|
|
|
|
/*
|
|
* Lookup table for transforming gpio module number 0 to 2 to
|
|
* address offsets
|
|
*/
|
|
static u32 module_base[] = {
|
|
GPIO1_BASE,
|
|
GPIO2_BASE
|
|
};
|
|
|
|
static void clrsetbits(u32 addr, u32 and_mask, u32 or_mask)
|
|
{
|
|
reg_write(addr, (reg_read(addr) & ~and_mask) | or_mask);
|
|
}
|
|
|
|
int vct_gpio_dir(int pin, int dir)
|
|
{
|
|
u32 gpio_base;
|
|
|
|
gpio_base = BASE_ADDR(GPIO_MODULE(pin));
|
|
|
|
if (dir == 0)
|
|
clrsetbits(GPIO_SWPORTA_DDR(gpio_base), MASK(pin), 0);
|
|
else
|
|
clrsetbits(GPIO_SWPORTA_DDR(gpio_base), 0, MASK(pin));
|
|
|
|
return 0;
|
|
}
|
|
|
|
void vct_gpio_set(int pin, int val)
|
|
{
|
|
u32 gpio_base;
|
|
|
|
gpio_base = BASE_ADDR(GPIO_MODULE(pin));
|
|
|
|
if (val == 0)
|
|
clrsetbits(GPIO_SWPORTA_DR(gpio_base), MASK(pin), 0);
|
|
else
|
|
clrsetbits(GPIO_SWPORTA_DR(gpio_base), 0, MASK(pin));
|
|
}
|
|
|
|
int vct_gpio_get(int pin)
|
|
{
|
|
u32 gpio_base;
|
|
u32 value;
|
|
|
|
gpio_base = BASE_ADDR(GPIO_MODULE(pin));
|
|
value = reg_read(GPIO_EXT_PORTA(gpio_base));
|
|
|
|
return ((value & MASK(pin)) ? 1 : 0);
|
|
}
|