mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 00:47:26 +00:00
c10809dd0f
Commit5248930ebf("dm: imx: cm_fx6: Enable more driver model support") enabled driver model support for USB, thereby effectively removing USB support because the cm_fx6 devicetree in the U-Boot does *not* enable the USB nodes. Reinstate the USB support by syncing the devicetree with Linux whose devicetree enables the USB nodes properly. More precisely, use the devicetree found in Linux v4.15-rc1 with the following two changes: 1) Remove the audio mux; the required dt-bindings header is not present in the U-Boot. 2) Keep the usdhc3 MMC controller node currently present in the U-Boot's devicetree to retain the ability to boot from MMC. Fixes:5248930ebf("dm: imx: cm_fx6: Enable more driver model support") Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
403 lines
10 KiB
Text
403 lines
10 KiB
Text
/*
|
|
* Copyright 2013 CompuLab Ltd.
|
|
*
|
|
* Author: Valentin Raevsky <valentin@compulab.co.il>
|
|
*
|
|
* This file is dual-licensed: you can use it either under the terms
|
|
* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
|
|
* a) This file is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* version 2 as published by the Free Software Foundation.
|
|
*
|
|
* This file is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* Or, alternatively,
|
|
*
|
|
* b) Permission is hereby granted, free of charge, to any person
|
|
* obtaining a copy of this software and associated documentation
|
|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use,
|
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
|
* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include "imx6q.dtsi"
|
|
|
|
/ {
|
|
model = "CompuLab CM-FX6";
|
|
compatible = "compulab,cm-fx6", "fsl,imx6q";
|
|
|
|
memory {
|
|
reg = <0x10000000 0x80000000>;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
heartbeat-led {
|
|
label = "Heartbeat";
|
|
gpios = <&gpio2 31 0>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
|
|
awnh387_pwrseq: pwrseq {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwrseq>;
|
|
compatible = "mmc-pwrseq-sd8787";
|
|
powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
|
|
reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "regulator-pcie-power-on-gpio";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
reg_usb_h1_vbus: usb_h1_vbus {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "usb_h1_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
reg_usb_otg_vbus: usb_otg_vbus {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "usb_otg_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
sound-analog {
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,name = "On-board analog audio";
|
|
simple-audio-card,widgets =
|
|
"Headphone", "Headphone Jack",
|
|
"Line", "Line Out",
|
|
"Microphone", "Mic Jack",
|
|
"Line", "Line In";
|
|
simple-audio-card,routing =
|
|
"Headphone Jack", "RHPOUT",
|
|
"Headphone Jack", "LHPOUT",
|
|
"MICIN", "Mic Bias",
|
|
"Mic Bias", "Mic Jack";
|
|
simple-audio-card,format = "i2s";
|
|
simple-audio-card,bitclock-master = <&sound_master>;
|
|
simple-audio-card,frame-master = <&sound_master>;
|
|
simple-audio-card,bitclock-inversion;
|
|
|
|
sound_master: simple-audio-card,cpu {
|
|
sound-dai = <&ssi2>;
|
|
system-clock-frequency = <2822400>;
|
|
};
|
|
|
|
simple-audio-card,codec {
|
|
sound-dai = <&wm8731>;
|
|
};
|
|
};
|
|
|
|
sound-spdif {
|
|
compatible = "fsl,imx-audio-spdif";
|
|
model = "imx-spdif";
|
|
spdif-controller = <&spdif>;
|
|
spdif-out;
|
|
spdif-in;
|
|
};
|
|
};
|
|
|
|
/*
|
|
* The U-Boot: audio mux node has been removed because the required dt-bindings
|
|
* header file is not present in the U-Boot.
|
|
*/
|
|
|
|
&cpu0 {
|
|
/*
|
|
* Although the imx6q fuse indicates that 1.2GHz operation is possible,
|
|
* the module behaves unstable at this frequency. Hence, remove the
|
|
* 1.2GHz operation point here.
|
|
*/
|
|
operating-points = <
|
|
/* kHz uV */
|
|
996000 1250000
|
|
852000 1250000
|
|
792000 1175000
|
|
396000 975000
|
|
>;
|
|
fsl,soc-operating-points = <
|
|
/* ARM kHz SOC-PU uV */
|
|
996000 1250000
|
|
852000 1250000
|
|
792000 1175000
|
|
396000 1175000
|
|
>;
|
|
};
|
|
|
|
&ecspi1 {
|
|
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "st,m25p", "jedec,spi-nor";
|
|
spi-max-frequency = <20000000>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_enet>;
|
|
phy-mode = "rgmii";
|
|
status = "okay";
|
|
};
|
|
|
|
&gpmi {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
|
|
eeprom@50 {
|
|
compatible = "atmel,24c02";
|
|
reg = <0x50>;
|
|
pagesize = <16>;
|
|
};
|
|
|
|
wm8731: codec@1a {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "wlf,wm8731";
|
|
reg = <0x1a>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
|
|
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
|
|
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
|
|
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
|
|
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
|
|
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet: enetgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpmi_nand: gpminandgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
|
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pcie: pciegrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
|
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwrseq: pwrseqgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
|
|
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_spdif: spdifgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
|
|
MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh1: usbh1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
|
|
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
|
|
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
|
|
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
|
|
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
|
|
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
|
|
>;
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
|
reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
|
|
vpcie-supply = <®_pcie_power_on_gpio>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
|
|
&snvs_poweroff {
|
|
status = "okay";
|
|
};
|
|
|
|
&spdif {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spdif>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi2 {
|
|
assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
|
|
<&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
|
|
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
|
|
assigned-clock-rates = <0>, <786432000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
vbus-supply = <®_usb_h1_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbh1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
dr_mode = "otg";
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
mmc-pwrseq = <&awnh387_pwrseq>;
|
|
non-removable;
|
|
/*
|
|
* If the OS probes the Bluetooth AMP function advertised on this bus
|
|
* but the firmware in place does not support it, the WiFi/BT module
|
|
* gets unresponsive.
|
|
* Users who configured their OS properly can enable this node to gain
|
|
* WiFi and/or plain Bluetooth support.
|
|
*/
|
|
status = "disabled";
|
|
};
|
|
|
|
/* The U-Boot: enable usdhc3 for mmc boot */
|
|
&usdhc3 {
|
|
status = "okay";
|
|
};
|