mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-29 02:42:16 +00:00
4fd9373bbb
Remove some of the board and arch specific non-DM_ETH helper code. Signed-off-by: Tom Rini <trini@konsulko.com>
60 lines
1.4 KiB
C
60 lines
1.4 KiB
C
/*
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* Internal Definitions
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*/
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#include <linux/stringify.h>
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#define BOOTFLASH_START 0xF0000000
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/*
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* DDR Setup
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*/
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#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
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#define CFG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
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DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
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#define CFG_83XX_DDR_USES_CS0
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/*
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* Manually set up DDR parameters
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*/
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#define CFG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */
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/*
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* The reserved memory
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*/
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#define CFG_SYS_FLASH_BASE 0xF0000000
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/* Reserve 768 kB for Mon */
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/*
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* Initial RAM Base Address Setup
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*/
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#define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
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#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
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/*
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* Init Local Bus Memory Controller:
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*
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* Bank Bus Machine PortSz Size Device
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* ---- --- ------- ------ ----- ------
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* 0 Local GPCM 16 bit 256MB FLASH
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* 1 Local GPCM 8 bit 128MB GPIO/PIGGY
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*
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*/
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/*
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* FLASH on the Local Bus
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*/
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#define CFG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
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#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE }
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#if defined(CONFIG_CMD_NAND)
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#define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE
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#endif
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CFG_SYS_BOOTMAPSZ (8 << 20)
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