Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-19 03:08:31 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/drivers/ddr/marvell/a38x
History
Marek Behún 90bcc3d38d driver/ddr: Add support for setting timing in hws_topology_map 
The DDR3 training code for Marvell A38X currently computes 1t timing
when given board topology map of the Turris Omnia, but Omnia needs 2t.

This patch adds support for enforcing the 2t timing in struct
hws_topology_map, through a new enum hws_timing, which can assume
following values:
  HWS_TIM_DEFAULT - default behaviour, compute whether to enable 2t
                    from the number of CSs
  HWS_TIM_1T      - enforce 1t
  HWS_TIM_2T      - enforce 2t

This patch also sets all the board topology maps (db-88f6820-amc,
db-88f6820-gp, controlcenterdc and clearfog) to have timing set to
HWS_TIM_DEFAULT.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-07-12 06:56:48 +02:00
..
ddr3_a38x.c drivers: squash lines for immediate return 2016-09-23 17:53:54 -04:00
ddr3_a38x.h arm: mvebu: a38x: Remove unsupported topologies 2015-11-17 23:41:41 +01:00
ddr3_a38x_mc_static.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_a38x_topology.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_a38x_training.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_debug.c arm: mvebu: ddr: Fix compilation warning 2016-01-14 14:08:59 +01:00
ddr3_hws_hw_training.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_hws_hw_training.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_hws_hw_training_def.h arm: mvebu: Fix SAR1_CPU_CORE_MASK 2015-11-17 23:41:41 +01:00
ddr3_hws_sil_training.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_init.c arm: mvebu: a38x: Weed out floating point use 2016-05-20 11:01:00 +02:00
ddr3_init.h Fix spelling of "occurred". 2016-05-02 18:37:09 -04:00
ddr3_logging_def.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_patterns_64bit.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_topology_def.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training.c driver/ddr: Add support for setting timing in hws_topology_map 2017-07-12 06:56:48 +02:00
ddr3_training_bist.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_centralization.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_db.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_hw_algo.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_hw_algo.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip.h arm: mvebu: ddr: Fix compilation warning 2016-01-14 14:08:59 +01:00
ddr3_training_ip_bist.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_centralization.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_db.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_def.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_engine.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_engine.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_flow.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_pbs.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_prv_if.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_static.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_leveling.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_leveling.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_pbs.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_static.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr_topology_def.h driver/ddr: Add support for setting timing in hws_topology_map 2017-07-12 06:56:48 +02:00
ddr_training_ip_db.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
Makefile arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
silicon_if.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
xor.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
xor.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
xor_regs.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00