mirror of
https://github.com/AsahiLinux/u-boot
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c837dcb1a3
before we can access it; add delay in case we are faster (with no CF card inserted) * Cleanup of some init functions * Make sure SCC Ethernet is always stopped by the time we boot Linux to avoid Linux crashes by early packets coming in. * Accelerate flash accesses on LWMON board by using buffered writes
365 lines
9.9 KiB
C
365 lines
9.9 KiB
C
/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <405gp_i2c.h>
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#include <command.h>
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#include <rtc.h>
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#include <post.h>
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#include <net.h>
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#include <malloc.h>
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#define L1_MEMSIZE (32*1024*1024)
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/* the std. DHCP stufff */
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#define DHCP_ROUTER 3
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#define DHCP_NETMASK 1
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#define DHCP_BOOTFILE 67
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#define DHCP_ROOTPATH 17
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#define DHCP_HOSTNAME 12
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/* some extras used by CRAY
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*
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* on the server this looks like:
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*
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* option L1-initrd-image code 224 = string;
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* option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
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*/
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#define DHCP_L1_INITRD 224
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/* new, [better?] way via official vendor-extensions, defining an option
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* space.
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* on the server this looks like:
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*
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* option space CRAYL1;
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* option CRAYL1.initrd code 3 = string;
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* ..etc...
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*/
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#define DHCP_VENDOR_SPECX 43
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#define DHCP_VX_INITRD 3
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#define DHCP_VX_BOOTCMD 4
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#define DHCP_VX_BOOTARGS 5
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#define DHCP_VX_ROOTDEV 6
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#define DHCP_VX_FROMFLASH 7
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#define DHCP_VX_BOOTSCRIPT 8
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#define DHCP_VX_RCFILE 9
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#define DHCP_VX_MAGIC 10
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/* Things DHCP server can tellme about. If there's no flash address, then
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* they dont participate in 'update' to flash, and we force their values
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* back to '0' every boot to be sure to get them fresh from DHCP. Yes, I
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* know this is a pain...
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*
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* If I get no bootfile, boot from flash. If rootpath, use that. If no
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* rootpath use initrd in flash.
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*/
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typedef struct dhcp_item_s {
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u8 dhcp_option;
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u8 dhcp_vendor_option;
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char *dhcpvalue;
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char *envname;
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} dhcp_item_t;
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static dhcp_item_t Things[] = {
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{DHCP_ROUTER, 0, NULL, "gateway"},
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{DHCP_NETMASK, 0, NULL, "netmask"},
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{DHCP_BOOTFILE, 0, NULL, "bootfile"},
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{DHCP_ROOTPATH, 0, NULL, "rootpath"},
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{DHCP_HOSTNAME, 0, NULL, "hostname"},
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{DHCP_L1_INITRD, 0, NULL, "initrd"},
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/* and the other way.. */
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{DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
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{DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
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{DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
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{DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
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{DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
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{DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
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{DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
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{DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
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};
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#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
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extern char bootscript[];
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/* Here is the boot logic as HUSH script. Overridden by any TFP provided
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* bootscript file.
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*/
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static void init_sdram (void);
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/* ------------------------------------------------------------------------- */
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int board_early_init_f (void)
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{
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/* Running from ROM: global data is still READONLY */
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init_sdram ();
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mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
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mtdcr (uicer, 0x00000000); /* disable all ints */
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mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
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mtdcr (uicpr, 0xFFFFFFE0); /* set int polarities */
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mtdcr (uictr, 0x10000000); /* set int trigger levels */
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mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
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mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
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return 0;
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}
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/* ------------------------------------------------------------------------- */
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int checkboard (void)
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{
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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/* ------------------------------------------------------------------------- */
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int misc_init_r (void)
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{
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unsigned char *s, *e;
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image_header_t *hdr;
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time_t timestamp;
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struct rtc_time tm;
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char bootcmd[32];
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hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
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timestamp = (time_t) hdr->ih_time;
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to_tm (timestamp, &tm);
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printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
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#define FACTORY_SETTINGS 0xFFFC0000
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if ((s = getenv ("ethaddr")) == NULL) {
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e = (unsigned char *) (FACTORY_SETTINGS);
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if (*(e + 0) != '0'
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|| *(e + 1) != '0'
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|| *(e + 2) != ':'
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|| *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') {
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printf ("No valid MAC address in flash location 0x3C0000!\n");
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} else {
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printf ("Factory MAC: %s\n", e);
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setenv ("ethaddr", e);
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}
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}
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sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
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setenv ("bootcmd", bootcmd);
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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long int initdram (int board_type)
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{
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return (L1_MEMSIZE);
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}
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/* ------------------------------------------------------------------------- */
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/* stubs so we can print dates w/o any nvram RTC.*/
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void rtc_get (struct rtc_time *tmp)
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{
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return;
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}
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void rtc_set (struct rtc_time *tmp)
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{
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return;
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}
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void rtc_reset (void)
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{
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return;
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}
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/* ------------------------------------------------------------------------- */
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/* Do sdram bank init in C so I can read it..no console to print to yet!
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*/
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static void init_sdram (void)
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{
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unsigned long tmp;
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/* write SDRAM bank 0 register */
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mtdcr (memcfga, mem_mb0cf);
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mtdcr (memcfgd, 0x00062001);
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/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
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/* To set the appropriate timings, we need to know the SDRAM speed. */
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/* We can use the PLB speed since the SDRAM speed is the same as */
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/* the PLB speed. The PLB speed is the FBK divider times the */
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/* 405GP reference clock, which on the L1 is 25Mhz. */
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/* Thus, if FBK div is 2, SDRAM is 50Mhz; if FBK div is 3, SDRAM is */
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/* 150Mhz; if FBK is 3, SDRAM is 150Mhz. */
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/* divisor = ((mfdcr(strap)>> 28) & 0x3); */
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/* write SDRAM timing for 100Mhz. */
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mtdcr (memcfga, mem_sdtr1);
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mtdcr (memcfgd, 0x0086400D);
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/* write SDRAM refresh interval register */
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mtdcr (memcfga, mem_rtr);
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mtdcr (memcfgd, 0x05F00000);
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udelay (200);
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/* sdram controller.*/
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mtdcr (memcfga, mem_mcopt1);
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mtdcr (memcfgd, 0x90800000);
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udelay (200);
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/* initially, disable ECC on all banks */
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udelay (200);
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mtdcr (memcfga, mem_ecccf);
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tmp = mfdcr (memcfgd);
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tmp &= 0xff0fffff;
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mtdcr (memcfga, mem_ecccf);
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mtdcr (memcfgd, tmp);
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return;
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}
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extern int memory_post_test (int flags);
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int testdram (void)
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{
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unsigned long tmp;
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uint *pstart = (uint *) 0x00000000;
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uint *pend = (uint *) L1_MEMSIZE;
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uint *p;
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if (getenv_r("booted",NULL,0) <= 0)
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{
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printf ("testdram..");
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/*AA*/
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for (p = pstart; p < pend; p++)
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*p = 0xaaaaaaaa;
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for (p = pstart; p < pend; p++) {
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if (*p != 0xaaaaaaaa) {
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printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
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(uint) p, *p, 0xaaaaaaaa);
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return 1;
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}
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}
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/*55*/
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for (p = pstart; p < pend; p++)
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*p = 0x55555555;
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for (p = pstart; p < pend; p++) {
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if (*p != 0x55555555) {
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printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
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(uint) p, *p, 0x55555555);
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return 1;
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}
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}
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/*addr*/
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for (p = pstart; p < pend; p++)
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*p = (unsigned)p;
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for (p = pstart; p < pend; p++) {
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if (*p != (unsigned)p) {
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printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
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(uint) p, *p, (uint)p);
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return 1;
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}
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}
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printf ("Success. ");
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}
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printf ("Enable ECC..");
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mtdcr (memcfga, mem_mcopt1);
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tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
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mtdcr (memcfga, mem_mcopt1);
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mtdcr (memcfgd, tmp);
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udelay (600);
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for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
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;
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udelay (400);
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mtdcr (memcfga, mem_ecccf);
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tmp = mfdcr (memcfgd);
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tmp |= 0x00800000;
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mtdcr (memcfgd, tmp);
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udelay (400);
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printf ("enabled.\n");
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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static u8 *dhcp_env_update (u8 thing, u8 * pop)
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{
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u8 i, oplen;
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oplen = *(pop + 1);
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if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
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printf ("Whoops! failed to malloc space for DHCP thing %s\n",
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Things[thing].envname);
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return NULL;
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}
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for (i = 0; (i < oplen); i++)
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if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ')
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break;
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*(Things[thing].dhcpvalue + i) = '\0';
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/* set env. */
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if (Things[thing].envname)
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{
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setenv (Things[thing].envname, Things[thing].dhcpvalue);
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}
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return (Things[thing].dhcpvalue);
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}
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/* ------------------------------------------------------------------------- */
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u8 *dhcp_vendorex_prep (u8 * e)
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{
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u8 thing;
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/* ask for the things I want. */
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*e++ = 55; /* Parameter Request List */
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*e++ = N_THINGS;
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for (thing = 0; thing < N_THINGS; thing++)
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*e++ = Things[thing].dhcp_option;
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*e++ = 255;
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return e;
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}
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/* ------------------------------------------------------------------------- */
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/* .. return NULL means it wasnt mine, non-null means I got it..*/
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u8 *dhcp_vendorex_proc (u8 * pop)
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{
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u8 oplen, *sub_op, sub_oplen, *retval;
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u8 thing = 0;
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retval = NULL;
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oplen = *(pop + 1);
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/* if pop is vender spec indicator, there are sub-options. */
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if (*pop == DHCP_VENDOR_SPECX) {
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for (sub_op = pop + 2;
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oplen && (sub_oplen = *(sub_op + 1));
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oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
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for (thing = 0; thing < N_THINGS; thing++) {
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if (*sub_op == Things[thing].dhcp_vendor_option) {
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if (!(retval = dhcp_env_update (thing, sub_op))) {
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return NULL;
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}
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}
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}
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}
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} else {
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for (thing = 0; thing < N_THINGS; thing++) {
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if (*pop == Things[thing].dhcp_option)
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if (!(retval = dhcp_env_update (thing, pop)))
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return NULL;
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}
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}
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return (pop);
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}
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