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c3c016cf75
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR. Take these bits into account when performing erase operations, making sure that the protected areas are skipped. Tested on a mx6qsabresd: => sf probe SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 offset 0x3f0000 is protected and cannot be erased SF: 65536 bytes @ 0x3f0000 Erased: ERROR => sf protect unlock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 SF: 65536 bytes @ 0x3f0000 Erased: OK Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> [re-worked to fit the lock common to dm and non-dm] Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>
252 lines
7.3 KiB
C
252 lines
7.3 KiB
C
/*
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* Common SPI flash Interface
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*
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* Copyright (C) 2008 Atmel Corporation
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* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*/
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#ifndef _SPI_FLASH_H_
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#define _SPI_FLASH_H_
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#include <dm.h> /* Because we dereference struct udevice here */
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#include <linux/types.h>
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#ifndef CONFIG_SF_DEFAULT_SPEED
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# define CONFIG_SF_DEFAULT_SPEED 1000000
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#endif
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#ifndef CONFIG_SF_DEFAULT_MODE
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# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
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#endif
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#ifndef CONFIG_SF_DEFAULT_CS
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# define CONFIG_SF_DEFAULT_CS 0
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#endif
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#ifndef CONFIG_SF_DEFAULT_BUS
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# define CONFIG_SF_DEFAULT_BUS 0
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#endif
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struct spi_slave;
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/**
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* struct spi_flash - SPI flash structure
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*
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* @spi: SPI slave
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* @dev: SPI flash device
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* @name: Name of SPI flash
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* @dual_flash: Indicates dual flash memories - dual stacked, parallel
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* @shift: Flash shift useful in dual parallel
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* @flags: Indication of spi flash flags
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* @size: Total flash size
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* @page_size: Write (page) size
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* @sector_size: Sector size
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* @erase_size: Erase size
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* @bank_read_cmd: Bank read cmd
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* @bank_write_cmd: Bank write cmd
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* @bank_curr: Current flash bank
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* @erase_cmd: Erase cmd 4K, 32K, 64K
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* @read_cmd: Read cmd - Array Fast, Extn read and quad read.
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* @write_cmd: Write cmd - page and quad program.
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* @dummy_byte: Dummy cycles for read operation.
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* @memory_map: Address of read-only SPI flash access
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* @flash_lock: lock a region of the SPI Flash
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* @flash_unlock: unlock a region of the SPI Flash
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* @flash_is_locked: check if a region of the SPI Flash is completely locked
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* @read: Flash read ops: Read len bytes at offset into buf
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* Supported cmds: Fast Array Read
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* @write: Flash write ops: Write len bytes from buf into offset
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* Supported cmds: Page Program
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* @erase: Flash erase ops: Erase len bytes from offset
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* Supported cmds: Sector erase 4K, 32K, 64K
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* return 0 - Success, 1 - Failure
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*/
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struct spi_flash {
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struct spi_slave *spi;
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#ifdef CONFIG_DM_SPI_FLASH
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struct udevice *dev;
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#endif
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const char *name;
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u8 dual_flash;
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u8 shift;
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u16 flags;
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u32 size;
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u32 page_size;
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u32 sector_size;
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u32 erase_size;
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#ifdef CONFIG_SPI_FLASH_BAR
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u8 bank_read_cmd;
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u8 bank_write_cmd;
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u8 bank_curr;
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#endif
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u8 erase_cmd;
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u8 read_cmd;
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u8 write_cmd;
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u8 dummy_byte;
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void *memory_map;
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int (*flash_lock)(struct spi_flash *flash, u32 ofs, size_t len);
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int (*flash_unlock)(struct spi_flash *flash, u32 ofs, size_t len);
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int (*flash_is_locked)(struct spi_flash *flash, u32 ofs, size_t len);
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#ifndef CONFIG_DM_SPI_FLASH
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/*
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* These are not strictly needed for driver model, but keep them here
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* while the transition is in progress.
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*
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* Normally each driver would provide its own operations, but for
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* SPI flash most chips use the same algorithms. One approach is
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* to create a 'common' SPI flash device which knows how to talk
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* to most devices, and then allow other drivers to be used instead
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* if required, perhaps with a way of scanning through the list to
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* find the driver that matches the device.
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*/
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int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
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int (*write)(struct spi_flash *flash, u32 offset, size_t len,
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const void *buf);
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int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
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#endif
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};
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struct dm_spi_flash_ops {
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int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf);
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int (*write)(struct udevice *dev, u32 offset, size_t len,
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const void *buf);
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int (*erase)(struct udevice *dev, u32 offset, size_t len);
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};
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/* Access the serial operations for a device */
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#define sf_get_ops(dev) ((struct dm_spi_flash_ops *)(dev)->driver->ops)
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#ifdef CONFIG_DM_SPI_FLASH
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/**
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* spi_flash_read_dm() - Read data from SPI flash
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*
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* @dev: SPI flash device
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* @offset: Offset into device in bytes to read from
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* @len: Number of bytes to read
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* @buf: Buffer to put the data that is read
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* @return 0 if OK, -ve on error
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*/
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int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf);
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/**
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* spi_flash_write_dm() - Write data to SPI flash
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*
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* @dev: SPI flash device
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* @offset: Offset into device in bytes to write to
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* @len: Number of bytes to write
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* @buf: Buffer containing bytes to write
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* @return 0 if OK, -ve on error
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*/
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int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
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const void *buf);
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/**
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* spi_flash_erase_dm() - Erase blocks of the SPI flash
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*
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* Note that @len must be a muiltiple of the flash sector size.
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*
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* @dev: SPI flash device
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* @offset: Offset into device in bytes to start erasing
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* @len: Number of bytes to erase
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* @return 0 if OK, -ve on error
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*/
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int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len);
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int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode,
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struct udevice **devp);
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/* Compatibility function - this is the old U-Boot API */
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struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode);
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/* Compatibility function - this is the old U-Boot API */
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void spi_flash_free(struct spi_flash *flash);
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int spi_flash_remove(struct udevice *flash);
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static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
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size_t len, void *buf)
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{
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return spi_flash_read_dm(flash->dev, offset, len, buf);
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}
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static inline int spi_flash_write(struct spi_flash *flash, u32 offset,
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size_t len, const void *buf)
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{
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return spi_flash_write_dm(flash->dev, offset, len, buf);
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}
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static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
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size_t len)
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{
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return spi_flash_erase_dm(flash->dev, offset, len);
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}
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struct sandbox_state;
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int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
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struct udevice *bus, int of_offset, const char *spec);
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void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
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#else
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struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode);
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/**
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* Set up a new SPI flash from an fdt node
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*
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* @param blob Device tree blob
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* @param slave_node Pointer to this SPI slave node in the device tree
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* @param spi_node Cached pointer to the SPI interface this node belongs
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* to
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* @return 0 if ok, -1 on error
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*/
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struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
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int spi_node);
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void spi_flash_free(struct spi_flash *flash);
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static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
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size_t len, void *buf)
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{
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return flash->read(flash, offset, len, buf);
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}
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static inline int spi_flash_write(struct spi_flash *flash, u32 offset,
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size_t len, const void *buf)
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{
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return flash->write(flash, offset, len, buf);
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}
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static inline int spi_flash_erase(struct spi_flash *flash, u32 offset,
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size_t len)
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{
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return flash->erase(flash, offset, len);
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}
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#endif
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static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len,
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bool prot)
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{
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if (!flash->flash_lock)
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return -EOPNOTSUPP;
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if (prot)
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return flash->flash_lock(flash, ofs, len);
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else
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return flash->flash_unlock(flash, ofs, len);
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}
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void spi_boot(void) __noreturn;
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void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
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#endif /* _SPI_FLASH_H_ */
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