mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
9946bfd4a0
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. General features: - Rockchip PX30 - Up to 2GB DDR4 - eMMC 4 GB expandible - rest of PX30 features PX30.Core needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 - C.TOUCH 2.0 Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
232 lines
4.8 KiB
Text
232 lines
4.8 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
|
|
* Copyright (c) 2020 Engicam srl
|
|
* Copyright (c) 2020 Amarula Solutons
|
|
* Copyright (c) 2020 Amarula Solutons(India)
|
|
*/
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/pinctrl/rockchip.h>
|
|
|
|
/ {
|
|
compatible = "engicam,px30-px30-core", "rockchip,px30";
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu-supply = <&vdd_arm>;
|
|
};
|
|
|
|
&cpu1 {
|
|
cpu-supply = <&vdd_arm>;
|
|
};
|
|
|
|
&cpu2 {
|
|
cpu-supply = <&vdd_arm>;
|
|
};
|
|
|
|
&cpu3 {
|
|
cpu-supply = <&vdd_arm>;
|
|
};
|
|
|
|
&emmc {
|
|
cap-mmc-highspeed;
|
|
mmc-hs200-1_8v;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
|
|
rk809: pmic@20 {
|
|
compatible = "rockchip,rk809";
|
|
reg = <0x20>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pmic_int>;
|
|
rockchip,system-power-controller;
|
|
wakeup-source;
|
|
#clock-cells = <1>;
|
|
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
|
|
|
vcc1-supply = <&vcc5v0_sys>;
|
|
vcc2-supply = <&vcc5v0_sys>;
|
|
vcc3-supply = <&vcc5v0_sys>;
|
|
vcc4-supply = <&vcc5v0_sys>;
|
|
vcc5-supply = <&vcc3v3_sys>;
|
|
vcc6-supply = <&vcc3v3_sys>;
|
|
vcc7-supply = <&vcc3v3_sys>;
|
|
vcc8-supply = <&vcc3v3_sys>;
|
|
vcc9-supply = <&vcc5v0_sys>;
|
|
|
|
regulators {
|
|
vdd_log: DCDC_REG1 {
|
|
regulator-name = "vdd_log";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <950000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <950000>;
|
|
};
|
|
};
|
|
|
|
vdd_arm: DCDC_REG2 {
|
|
regulator-name = "vdd_arm";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <950000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <950000>;
|
|
};
|
|
};
|
|
|
|
vcc_ddr: DCDC_REG3 {
|
|
regulator-name = "vcc_ddr";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_3v3: DCDC_REG4 {
|
|
regulator-name = "vcc_3v3";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc3v3_sys: DCDC_REG5 {
|
|
regulator-name = "vcc3v3_sys";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc_1v0: LDO_REG1 {
|
|
regulator-name = "vcc_1v0";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
};
|
|
};
|
|
|
|
vcc_1v8: LDO_REG2 {
|
|
regulator-name = "vcc_1v8";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd_1v0: LDO_REG3 {
|
|
regulator-name = "vdd_1v0";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
};
|
|
};
|
|
|
|
vcc3v0_pmu: LDO_REG4 {
|
|
regulator-name = "vcc3v0_pmu";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
|
|
};
|
|
};
|
|
|
|
vccio_sd: LDO_REG5 {
|
|
regulator-name = "vccio_sd";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc5v0_host: SWITCH_REG2 {
|
|
regulator-name = "vcc5v0_host";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&io_domains {
|
|
vccio1-supply = <&vcc_3v3>;
|
|
vccio2-supply = <&vcc_3v3>;
|
|
vccio3-supply = <&vcc_3v3>;
|
|
vccio4-supply = <&vcc_3v3>;
|
|
vccio5-supply = <&vcc_3v3>;
|
|
vccio6-supply = <&vcc_1v8>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
pmic {
|
|
pmic_int: pmic_int {
|
|
rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
pmuio1-supply = <&vcc_3v3>;
|
|
pmuio2-supply = <&vcc_3v3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
rockchip,hw-tshut-mode = <1>;
|
|
rockchip,hw-tshut-polarity = <1>;
|
|
status = "okay";
|
|
};
|