mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
da77a787ff
This imports the changes and the new Odroid-C4 board from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
385 lines
11 KiB
Text
385 lines
11 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 BayLibre, SAS
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#include "meson-g12-common.dtsi"
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#include <dt-bindings/clock/axg-audio-clkc.h>
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#include <dt-bindings/power/meson-g12a-power.h>
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#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
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#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
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/ {
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tdmif_a: audio-controller-0 {
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compatible = "amlogic,axg-tdm-iface";
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#sound-dai-cells = <0>;
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sound-name-prefix = "TDM_A";
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clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
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<&clkc_audio AUD_CLKID_MST_A_SCLK>,
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<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
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clock-names = "mclk", "sclk", "lrclk";
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status = "disabled";
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};
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tdmif_b: audio-controller-1 {
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compatible = "amlogic,axg-tdm-iface";
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#sound-dai-cells = <0>;
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sound-name-prefix = "TDM_B";
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clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
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<&clkc_audio AUD_CLKID_MST_B_SCLK>,
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<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
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clock-names = "mclk", "sclk", "lrclk";
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status = "disabled";
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};
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tdmif_c: audio-controller-2 {
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compatible = "amlogic,axg-tdm-iface";
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#sound-dai-cells = <0>;
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sound-name-prefix = "TDM_C";
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clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
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<&clkc_audio AUD_CLKID_MST_C_SCLK>,
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<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
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clock-names = "mclk", "sclk", "lrclk";
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status = "disabled";
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};
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};
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&apb {
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pdm: audio-controller@40000 {
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compatible = "amlogic,g12a-pdm",
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"amlogic,axg-pdm";
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reg = <0x0 0x40000 0x0 0x34>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "PDM";
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clocks = <&clkc_audio AUD_CLKID_PDM>,
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<&clkc_audio AUD_CLKID_PDM_DCLK>,
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<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
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clock-names = "pclk", "dclk", "sysclk";
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resets = <&clkc_audio AUD_RESET_PDM>;
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status = "disabled";
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};
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audio: bus@42000 {
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compatible = "simple-bus";
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reg = <0x0 0x42000 0x0 0x2000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
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clkc_audio: clock-controller@0 {
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status = "disabled";
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compatible = "amlogic,g12a-audio-clkc";
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reg = <0x0 0x0 0x0 0xb4>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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clocks = <&clkc CLKID_AUDIO>,
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<&clkc CLKID_MPLL0>,
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<&clkc CLKID_MPLL1>,
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<&clkc CLKID_MPLL2>,
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<&clkc CLKID_MPLL3>,
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<&clkc CLKID_HIFI_PLL>,
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<&clkc CLKID_FCLK_DIV3>,
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_GP0_PLL>;
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clock-names = "pclk",
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"mst_in0",
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"mst_in1",
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"mst_in2",
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"mst_in3",
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"mst_in4",
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"mst_in5",
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"mst_in6",
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"mst_in7";
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resets = <&reset RESET_AUDIO>;
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};
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toddr_a: audio-controller@100 {
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compatible = "amlogic,g12a-toddr",
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"amlogic,axg-toddr";
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reg = <0x0 0x100 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "TODDR_A";
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interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
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resets = <&arb AXG_ARB_TODDR_A>,
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<&clkc_audio AUD_RESET_TODDR_A>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <512>;
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status = "disabled";
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};
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toddr_b: audio-controller@140 {
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compatible = "amlogic,g12a-toddr",
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"amlogic,axg-toddr";
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reg = <0x0 0x140 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "TODDR_B";
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interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
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resets = <&arb AXG_ARB_TODDR_B>,
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<&clkc_audio AUD_RESET_TODDR_B>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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toddr_c: audio-controller@180 {
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compatible = "amlogic,g12a-toddr",
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"amlogic,axg-toddr";
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reg = <0x0 0x180 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "TODDR_C";
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interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
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resets = <&arb AXG_ARB_TODDR_C>,
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<&clkc_audio AUD_RESET_TODDR_C>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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frddr_a: audio-controller@1c0 {
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compatible = "amlogic,g12a-frddr",
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"amlogic,axg-frddr";
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reg = <0x0 0x1c0 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "FRDDR_A";
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interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
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resets = <&arb AXG_ARB_FRDDR_A>,
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<&clkc_audio AUD_RESET_FRDDR_A>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <512>;
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status = "disabled";
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};
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frddr_b: audio-controller@200 {
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compatible = "amlogic,g12a-frddr",
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"amlogic,axg-frddr";
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reg = <0x0 0x200 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "FRDDR_B";
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interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
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resets = <&arb AXG_ARB_FRDDR_B>,
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<&clkc_audio AUD_RESET_FRDDR_B>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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frddr_c: audio-controller@240 {
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compatible = "amlogic,g12a-frddr",
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"amlogic,axg-frddr";
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reg = <0x0 0x240 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "FRDDR_C";
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interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
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resets = <&arb AXG_ARB_FRDDR_C>,
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<&clkc_audio AUD_RESET_FRDDR_C>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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arb: reset-controller@280 {
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status = "disabled";
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compatible = "amlogic,meson-axg-audio-arb";
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reg = <0x0 0x280 0x0 0x4>;
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#reset-cells = <1>;
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clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
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};
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tdmin_a: audio-controller@300 {
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compatible = "amlogic,g12a-tdmin",
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"amlogic,axg-tdmin";
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reg = <0x0 0x300 0x0 0x40>;
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sound-name-prefix = "TDMIN_A";
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resets = <&clkc_audio AUD_RESET_TDMIN_A>;
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clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
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<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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tdmin_b: audio-controller@340 {
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compatible = "amlogic,g12a-tdmin",
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"amlogic,axg-tdmin";
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reg = <0x0 0x340 0x0 0x40>;
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sound-name-prefix = "TDMIN_B";
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resets = <&clkc_audio AUD_RESET_TDMIN_B>;
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clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
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<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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tdmin_c: audio-controller@380 {
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compatible = "amlogic,g12a-tdmin",
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"amlogic,axg-tdmin";
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reg = <0x0 0x380 0x0 0x40>;
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sound-name-prefix = "TDMIN_C";
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resets = <&clkc_audio AUD_RESET_TDMIN_C>;
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clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
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<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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tdmin_lb: audio-controller@3c0 {
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compatible = "amlogic,g12a-tdmin",
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"amlogic,axg-tdmin";
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reg = <0x0 0x3c0 0x0 0x40>;
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sound-name-prefix = "TDMIN_LB";
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resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
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clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
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<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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spdifin: audio-controller@400 {
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compatible = "amlogic,g12a-spdifin",
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"amlogic,axg-spdifin";
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reg = <0x0 0x400 0x0 0x30>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "SPDIFIN";
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interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
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<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
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clock-names = "pclk", "refclk";
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resets = <&clkc_audio AUD_RESET_SPDIFIN>;
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status = "disabled";
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};
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spdifout: audio-controller@480 {
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compatible = "amlogic,g12a-spdifout",
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"amlogic,axg-spdifout";
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reg = <0x0 0x480 0x0 0x50>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "SPDIFOUT";
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clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
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<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
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clock-names = "pclk", "mclk";
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resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
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status = "disabled";
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};
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tdmout_a: audio-controller@500 {
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compatible = "amlogic,g12a-tdmout";
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reg = <0x0 0x500 0x0 0x40>;
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sound-name-prefix = "TDMOUT_A";
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resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
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clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
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<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
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<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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tdmout_b: audio-controller@540 {
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compatible = "amlogic,g12a-tdmout";
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reg = <0x0 0x540 0x0 0x40>;
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sound-name-prefix = "TDMOUT_B";
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resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
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clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
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<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
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<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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tdmout_c: audio-controller@580 {
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compatible = "amlogic,g12a-tdmout";
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reg = <0x0 0x580 0x0 0x40>;
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sound-name-prefix = "TDMOUT_C";
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resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
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clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
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<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
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<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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spdifout_b: audio-controller@680 {
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compatible = "amlogic,g12a-spdifout",
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"amlogic,axg-spdifout";
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reg = <0x0 0x680 0x0 0x50>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "SPDIFOUT_B";
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clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
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<&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
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clock-names = "pclk", "mclk";
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resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
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status = "disabled";
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};
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toacodec: audio-controller@740 {
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compatible = "amlogic,g12a-toacodec";
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reg = <0x0 0x740 0x0 0x4>;
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#sound-dai-cells = <1>;
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sound-name-prefix = "TOACODEC";
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resets = <&clkc_audio AUD_RESET_TOACODEC>;
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status = "disabled";
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};
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tohdmitx: audio-controller@744 {
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compatible = "amlogic,g12a-tohdmitx";
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reg = <0x0 0x744 0x0 0x4>;
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#sound-dai-cells = <1>;
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sound-name-prefix = "TOHDMITX";
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resets = <&clkc_audio AUD_RESET_TOHDMITX>;
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status = "disabled";
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};
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};
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};
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ðmac {
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power-domains = <&pwrc PWRC_G12A_ETH_ID>;
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};
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&vpu {
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power-domains = <&pwrc PWRC_G12A_VPU_ID>;
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};
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&sd_emmc_a {
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amlogic,dram-access-quirk;
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};
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&simplefb_cvbs {
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power-domains = <&pwrc PWRC_G12A_VPU_ID>;
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};
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&simplefb_hdmi {
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power-domains = <&pwrc PWRC_G12A_VPU_ID>;
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};
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