u-boot/drivers/ddr/imx/imx8m
Rasmus Villemoes 290ffe5788 imx8m: fix reading of DDR4 MR registers
I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me

 tmp = 0x00ffff00
 tmp = 0x00070700
 tmp = 0x00000000
 tmp = 0x00101000

and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.

So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.

This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-05-20 09:30:28 +02:00
..
ddr_init.c imx: ddr: imx8m: Move selfref_en after DDR scrub 2021-01-23 11:30:30 +01:00
ddrphy_csr.c drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00
ddrphy_train.c drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue 2020-07-14 15:23:46 +08:00
ddrphy_utils.c imx8m: fix reading of DDR4 MR registers 2022-05-20 09:30:28 +02:00
helper.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
Kconfig imx8mp: refine power on imx8mp board 2021-04-08 09:18:29 +02:00
Makefile driver: ddr: Refine the ddr init driver on imx8m 2019-10-08 16:36:37 +02:00