mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 23:51:33 +00:00
726a802fda
Since ARMv5, the clz instruction allows for efficient implementation of ffs/fls with builtins. Until ARMv7 (with Thumb-2), this instruction is only available in ARM mode. LTO makes it difficult to force specific functions to be in ARM mode, as it is effectively a form of very aggressive inlining. To work around this, fls/ffs are implemented in assembly for ARMv5 and ARMv6 when compiling U-Boot in Thumb mode. Overall, this saves around 75 bytes per call. This code is synced with v5.15 of the Linux kernel. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Tom Rini <trini@konsulko.com>
45 lines
724 B
ArmAsm
45 lines
724 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2023 Sean Anderson <sean.anderson@seco.com>
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*
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* ARM bitops to call when using THUMB1, which doesn't have these instructions.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.pushsection .text.__fls
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ENTRY(__fls)
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clz r0, r0
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rsb r0, r0, #31
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ret lr
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ENDPROC(__fls)
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.popsection
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.pushsection .text.__ffs
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ENTRY(__ffs)
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rsb r3, r0, #0
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and r0, r0, r3
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clz r0, r0
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rsb r0, r0, #31
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ret lr
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ENDPROC(__ffs)
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.popsection
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.pushsection .text.fls
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ENTRY(fls)
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cmp r0, #0
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clzne r0, r0
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rsbne r0, r0, #32
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ret lr
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ENDPROC(fls)
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.popsection
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.pushsection .text.ffs
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ENTRY(ffs)
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rsb r3, r0, #0
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and r0, r0, r3
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clz r0, r0
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rsb r0, r0, #32
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ret lr
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ENDPROC(ffs)
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.popsection
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