mirror of
https://github.com/AsahiLinux/u-boot
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52bc7c7e2b
This fixes commit 1a37889b0a
:
----------------------->8--------------------
eeprom: Pull out the RW loop
Unify the code for doing read/write into single function, since the
code for both the read and write is almost identical. This again
trims down the code duplication.
----------------------->8--------------------
where the same one routine is utilized for both EEPROM writing and
reading. The only difference was supposed to be a "read" flag which
in both cases was set with 1 somehow.
That lead to a missing delay in case of writing which lead to write
failure (in my case no data was written).
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
265 lines
6.3 KiB
C
265 lines
6.3 KiB
C
/*
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* (C) Copyright 2000, 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Support for read and write access to EEPROM like memory devices. This
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* includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
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* FRAM devices read and write data at bus speed. In particular, there is no
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* write delay. Also, there is no limit imposed on the number of bytes that can
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* be transferred with a single read or write.
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*
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* Use the following configuration options to ensure no unneeded performance
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* degradation (typical for EEPROM) is incured for FRAM memory:
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*
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* #define CONFIG_SYS_I2C_FRAM
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* #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
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*
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*/
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#include <common.h>
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#include <config.h>
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#include <command.h>
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#include <i2c.h>
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#ifndef CONFIG_SYS_I2C_SPEED
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#define CONFIG_SYS_I2C_SPEED 50000
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#endif
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#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 0
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#endif
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#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 8
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#endif
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#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
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#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
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/*
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* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
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* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
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*
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* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
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* 0x00000nxx for EEPROM address selectors and page number at n.
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*/
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#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \
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(CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \
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(CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
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#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
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#endif
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#endif
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__weak int eeprom_write_enable(unsigned dev_addr, int state)
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{
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return 0;
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}
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void eeprom_init(int bus)
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{
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/* SPI EEPROM */
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#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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spi_init_f();
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#endif
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/* I2C EEPROM */
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
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#if defined(CONFIG_SYS_I2C)
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if (bus >= 0)
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i2c_set_bus_num(bus);
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#endif
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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#endif
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}
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static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)
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{
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unsigned blk_off;
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int alen;
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blk_off = offset & 0xff; /* block offset */
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#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
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addr[0] = offset >> 8; /* block number */
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addr[1] = blk_off; /* block offset */
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alen = 2;
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#else
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addr[0] = offset >> 16; /* block number */
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addr[1] = offset >> 8; /* upper address octet */
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addr[2] = blk_off; /* lower address octet */
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alen = 3;
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#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
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addr[0] |= dev_addr; /* insert device address */
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return alen;
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}
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static int eeprom_len(unsigned offset, unsigned end)
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{
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unsigned len = end - offset;
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/*
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* For a FRAM device there is no limit on the number of the
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* bytes that can be ccessed with the single read or write
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* operation.
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*/
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#if !defined(CONFIG_SYS_I2C_FRAM)
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unsigned blk_off = offset & 0xff;
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unsigned maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
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if (maxlen > I2C_RXTX_LEN)
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maxlen = I2C_RXTX_LEN;
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if (len > maxlen)
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len = maxlen;
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#endif
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return len;
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}
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static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
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uchar *buffer, unsigned len, bool read)
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{
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int ret = 0;
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/* SPI */
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#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
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if (read)
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spi_read(addr, alen, buffer, len);
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else
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spi_write(addr, alen, buffer, len);
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#else /* I2C */
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#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
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i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
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#endif
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if (read)
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ret = i2c_read(addr[0], offset, alen - 1, buffer, len);
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else
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ret = i2c_write(addr[0], offset, alen - 1, buffer, len);
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if (ret)
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ret = 1;
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#endif
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return ret;
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}
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static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer,
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unsigned cnt, bool read)
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{
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unsigned end = offset + cnt;
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unsigned alen, len;
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int rcode = 0;
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uchar addr[3];
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while (offset < end) {
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alen = eeprom_addr(dev_addr, offset, addr);
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len = eeprom_len(offset, end);
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rcode = eeprom_rw_block(offset, addr, alen, buffer, len, read);
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buffer += len;
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offset += len;
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if (!read)
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udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
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}
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return rcode;
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}
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int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
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{
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/*
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* Read data until done or would cross a page boundary.
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* We must write the address again when changing pages
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* because the next page may be in a different device.
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*/
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return eeprom_rw(dev_addr, offset, buffer, cnt, 1);
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}
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int eeprom_write(unsigned dev_addr, unsigned offset,
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uchar *buffer, unsigned cnt)
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{
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int ret;
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eeprom_write_enable(dev_addr, 1);
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/*
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* Write data until done or would cross a write page boundary.
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* We must write the address again when changing pages
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* because the address counter only increments within a page.
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*/
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ret = eeprom_rw(dev_addr, offset, buffer, cnt, 0);
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eeprom_write_enable(dev_addr, 0);
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return ret;
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}
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static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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const char *const fmt =
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"\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
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char * const *args = &argv[2];
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int rcode;
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ulong dev_addr, addr, off, cnt;
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int bus_addr;
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switch (argc) {
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#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
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case 5:
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bus_addr = -1;
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dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
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break;
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#endif
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case 6:
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bus_addr = -1;
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dev_addr = simple_strtoul(*args++, NULL, 16);
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break;
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case 7:
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bus_addr = simple_strtoul(*args++, NULL, 16);
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dev_addr = simple_strtoul(*args++, NULL, 16);
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break;
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default:
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return CMD_RET_USAGE;
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}
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addr = simple_strtoul(*args++, NULL, 16);
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off = simple_strtoul(*args++, NULL, 16);
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cnt = simple_strtoul(*args++, NULL, 16);
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eeprom_init(bus_addr);
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if (strcmp(argv[1], "read") == 0) {
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printf(fmt, dev_addr, argv[1], addr, off, cnt);
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rcode = eeprom_read(dev_addr, off, (uchar *)addr, cnt);
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puts("done\n");
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return rcode;
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} else if (strcmp(argv[1], "write") == 0) {
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printf(fmt, dev_addr, argv[1], addr, off, cnt);
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rcode = eeprom_write(dev_addr, off, (uchar *)addr, cnt);
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puts("done\n");
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return rcode;
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}
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return CMD_RET_USAGE;
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}
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U_BOOT_CMD(
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eeprom, 7, 1, do_eeprom,
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"EEPROM sub-system",
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"read <bus> <devaddr> addr off cnt\n"
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"eeprom write <bus> <devaddr> addr off cnt\n"
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" - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
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)
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