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On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit wide on sLD3 SoC. Support it for the sLD3 pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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.. | ||
ath79 | ||
exynos | ||
meson | ||
nxp | ||
rockchip | ||
uniphier | ||
Kconfig | ||
Makefile | ||
pinctrl-at91-pio4.c | ||
pinctrl-generic.c | ||
pinctrl-sandbox.c | ||
pinctrl-uclass.c | ||
pinctrl_pic32.c |