mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
03578d940d
Enable DDR52 modes, since the SD core supports correct switching now. For completeness, list HS200 modes, however those were already enabled. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
38 lines
646 B
Text
38 lines
646 B
Text
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Device Tree Source extras for U-Boot for the ULCB board
|
|
*
|
|
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
|
*/
|
|
|
|
#include "r8a77950-ulcb.dts"
|
|
#include "r8a77950-u-boot.dtsi"
|
|
|
|
/ {
|
|
cpld {
|
|
compatible = "renesas,ulcb-cpld";
|
|
status = "okay";
|
|
gpio-sck = <&gpio6 8 0>;
|
|
gpio-mosi = <&gpio6 7 0>;
|
|
gpio-miso = <&gpio6 10 0>;
|
|
gpio-sstbz = <&gpio2 3 0>;
|
|
};
|
|
};
|
|
|
|
&sdhi0 {
|
|
sd-uhs-sdr12;
|
|
sd-uhs-sdr25;
|
|
sd-uhs-sdr104;
|
|
max-frequency = <208000000>;
|
|
};
|
|
|
|
&sdhi2 {
|
|
mmc-ddr-1_8v;
|
|
mmc-hs200-1_8v;
|
|
mmc-hs400-1_8v;
|
|
max-frequency = <200000000>;
|
|
};
|
|
|
|
&vcc_sdhi0 {
|
|
u-boot,off-on-delay-us = <20000>;
|
|
};
|