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https://github.com/AsahiLinux/u-boot
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f485c8a35b
Adds an ET1011C PHY driver which is derived from the Linux kernel PHY driver (drivers/net/phy/et1011c.c) from the v3.9-rc2 tag. Note that an errata workaround config option is implemented to allow for TX_CLK to be enabled even when gigabit mode is negotiated. This workaround is used on the PG1.0 TI814X EVM. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
110 lines
2.8 KiB
C
110 lines
2.8 KiB
C
/*
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* ET1011C PHY driver
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*
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* Derived from Linux kernel driver by Chaithrika U S
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* Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <config.h>
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#include <phy.h>
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#define ET1011C_CONFIG_REG (0x16)
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#define ET1011C_TX_FIFO_MASK (0x3 << 12)
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#define ET1011C_TX_FIFO_DEPTH_8 (0x0 << 12)
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#define ET1011C_TX_FIFO_DEPTH_16 (0x1 << 12)
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#define ET1011C_INTERFACE_MASK (0x7 << 0)
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#define ET1011C_GMII_INTERFACE (0x2 << 0)
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#define ET1011C_SYS_CLK_EN (0x1 << 4)
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#define ET1011C_TX_CLK_EN (0x1 << 5)
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#define ET1011C_STATUS_REG (0x1A)
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#define ET1011C_DUPLEX_STATUS (0x1 << 7)
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#define ET1011C_SPEED_MASK (0x3 << 8)
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#define ET1011C_SPEED_1000 (0x2 << 8)
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#define ET1011C_SPEED_100 (0x1 << 8)
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#define ET1011C_SPEED_10 (0x0 << 8)
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static int et1011c_config(struct phy_device *phydev)
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{
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int ctl = 0;
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ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
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if (ctl < 0)
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return ctl;
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ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 |
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BMCR_ANENABLE);
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/* First clear the PHY */
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phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl | BMCR_RESET);
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return genphy_config_aneg(phydev);
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}
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static int et1011c_parse_status(struct phy_device *phydev)
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{
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int mii_reg;
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int speed;
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mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_STATUS_REG);
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if (mii_reg & ET1011C_DUPLEX_STATUS)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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speed = mii_reg & ET1011C_SPEED_MASK;
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switch (speed) {
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case ET1011C_SPEED_1000:
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phydev->speed = SPEED_1000;
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mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG);
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mii_reg &= ~ET1011C_TX_FIFO_MASK;
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phy_write(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG,
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mii_reg |
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ET1011C_GMII_INTERFACE |
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ET1011C_SYS_CLK_EN |
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#ifdef CONFIG_PHY_ET1011C_TX_CLK_FIX
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ET1011C_TX_CLK_EN |
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#endif
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ET1011C_TX_FIFO_DEPTH_16);
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break;
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case ET1011C_SPEED_100:
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phydev->speed = SPEED_100;
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break;
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case ET1011C_SPEED_10:
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phydev->speed = SPEED_10;
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break;
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}
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return 0;
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}
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static int et1011c_startup(struct phy_device *phydev)
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{
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genphy_update_link(phydev);
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et1011c_parse_status(phydev);
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return 0;
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}
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static struct phy_driver et1011c_driver = {
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.name = "ET1011C",
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.uid = 0x0282f014,
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.mask = 0xfffffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &et1011c_config,
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.startup = &et1011c_startup,
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};
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int phy_et1011c_init(void)
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{
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phy_register(&et1011c_driver);
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return 0;
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}
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