mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-27 21:43:45 +00:00
0b42fdca2d
Synchronise device tree with linux v6.1-rc3.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
50 lines
1.7 KiB
C
50 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2020 NXP
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*/
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#ifndef DT_BINDING_RESET_IMX8MP_H
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#define DT_BINDING_RESET_IMX8MP_H
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#define IMX8MP_RESET_A53_CORE_POR_RESET0 0
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#define IMX8MP_RESET_A53_CORE_POR_RESET1 1
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#define IMX8MP_RESET_A53_CORE_POR_RESET2 2
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#define IMX8MP_RESET_A53_CORE_POR_RESET3 3
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#define IMX8MP_RESET_A53_CORE_RESET0 4
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#define IMX8MP_RESET_A53_CORE_RESET1 5
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#define IMX8MP_RESET_A53_CORE_RESET2 6
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#define IMX8MP_RESET_A53_CORE_RESET3 7
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#define IMX8MP_RESET_A53_DBG_RESET0 8
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#define IMX8MP_RESET_A53_DBG_RESET1 9
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#define IMX8MP_RESET_A53_DBG_RESET2 10
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#define IMX8MP_RESET_A53_DBG_RESET3 11
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#define IMX8MP_RESET_A53_ETM_RESET0 12
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#define IMX8MP_RESET_A53_ETM_RESET1 13
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#define IMX8MP_RESET_A53_ETM_RESET2 14
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#define IMX8MP_RESET_A53_ETM_RESET3 15
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#define IMX8MP_RESET_A53_SOC_DBG_RESET 16
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#define IMX8MP_RESET_A53_L2RESET 17
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#define IMX8MP_RESET_SW_NON_SCLR_M7C_RST 18
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#define IMX8MP_RESET_OTG1_PHY_RESET 19
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#define IMX8MP_RESET_OTG2_PHY_RESET 20
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#define IMX8MP_RESET_SUPERMIX_RESET 21
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#define IMX8MP_RESET_AUDIOMIX_RESET 22
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#define IMX8MP_RESET_MLMIX_RESET 23
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#define IMX8MP_RESET_PCIEPHY 24
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#define IMX8MP_RESET_PCIEPHY_PERST 25
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#define IMX8MP_RESET_PCIE_CTRL_APPS_EN 26
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#define IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF 27
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#define IMX8MP_RESET_HDMI_PHY_APB_RESET 28
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#define IMX8MP_RESET_MEDIA_RESET 29
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#define IMX8MP_RESET_GPU2D_RESET 30
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#define IMX8MP_RESET_GPU3D_RESET 31
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#define IMX8MP_RESET_GPU_RESET 32
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#define IMX8MP_RESET_VPU_RESET 33
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#define IMX8MP_RESET_VPU_G1_RESET 34
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#define IMX8MP_RESET_VPU_G2_RESET 35
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#define IMX8MP_RESET_VPUVC8KE_RESET 36
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#define IMX8MP_RESET_NOC_RESET 37
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#define IMX8MP_RESET_NUM 38
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#endif
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