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6e7df1d151
At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
144 lines
3.5 KiB
C
144 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Faraday USB 2.0 EHCI Controller
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*
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* (C) Copyright 2010 Faraday Technology
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* Dante Su <dantesu@faraday-tech.com>
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*/
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#include <common.h>
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#include <log.h>
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#include <asm/io.h>
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#include <usb.h>
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#include <linux/delay.h>
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#include <usb/fusbh200.h>
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#include <usb/fotg210.h>
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#include "ehci.h"
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#ifndef CFG_USB_EHCI_BASE_LIST
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#define CFG_USB_EHCI_BASE_LIST { CONFIG_USB_EHCI_BASE }
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#endif
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union ehci_faraday_regs {
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struct fusbh200_regs usb;
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struct fotg210_regs otg;
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};
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static inline int ehci_is_fotg2xx(union ehci_faraday_regs *regs)
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{
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return !readl(®s->usb.easstr);
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}
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void faraday_ehci_set_usbmode(struct ehci_ctrl *ctrl)
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{
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/* nothing needs to be done */
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}
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int faraday_ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
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{
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int spd, ret = PORTSC_PSPD_HS;
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union ehci_faraday_regs *regs;
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ret = (void __iomem *)((ulong)ctrl->hcor - 0x10);
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if (ehci_is_fotg2xx(regs))
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spd = OTGCSR_SPD(readl(®s->otg.otgcsr));
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else
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spd = BMCSR_SPD(readl(®s->usb.bmcsr));
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switch (spd) {
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case 0: /* full speed */
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ret = PORTSC_PSPD_FS;
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break;
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case 1: /* low speed */
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ret = PORTSC_PSPD_LS;
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break;
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case 2: /* high speed */
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ret = PORTSC_PSPD_HS;
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break;
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default:
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printf("ehci-faraday: invalid device speed\n");
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break;
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}
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return ret;
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}
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uint32_t *faraday_ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
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{
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/* Faraday EHCI has one and only one portsc register */
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if (port) {
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/* Printing the message would cause a scan failure! */
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debug("The request port(%d) is not configured\n", port);
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return NULL;
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}
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/* Faraday EHCI PORTSC register offset is 0x20 from hcor */
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return (uint32_t *)((uint8_t *)ctrl->hcor + 0x20);
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}
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static const struct ehci_ops faraday_ehci_ops = {
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.set_usb_mode = faraday_ehci_set_usbmode,
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.get_port_speed = faraday_ehci_get_port_speed,
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.get_portsc_register = faraday_ehci_get_portsc_register,
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};
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/*
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* Create the appropriate control structures to manage
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* a new EHCI host controller.
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*/
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor)
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{
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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union ehci_faraday_regs *regs;
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uint32_t base_list[] = CFG_USB_EHCI_BASE_LIST;
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if (index < 0 || index >= ARRAY_SIZE(base_list))
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return -1;
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ehci_set_controller_priv(index, NULL, &faraday_ehci_ops);
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regs = (void __iomem *)base_list[index];
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hccr = (struct ehci_hccr *)®s->usb.hccr;
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hcor = (struct ehci_hcor *)®s->usb.hcor;
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if (ehci_is_fotg2xx(regs)) {
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/* A-device bus reset */
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/* ... Power off A-device */
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setbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSDROP);
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/* ... Drop vbus and bus traffic */
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clrbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSREQ);
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mdelay(1);
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/* ... Power on A-device */
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clrbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSDROP);
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/* ... Drive vbus and bus traffic */
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setbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSREQ);
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mdelay(1);
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/* Disable OTG & DEV interrupts, triggered at level-high */
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writel(IMR_IRQLH | IMR_OTG | IMR_DEV, ®s->otg.imr);
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/* Clear all interrupt status */
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writel(ISR_HOST | ISR_OTG | ISR_DEV, ®s->otg.isr);
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} else {
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/* Interrupt=level-high */
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setbits_le32(®s->usb.bmcsr, BMCSR_IRQLH);
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/* VBUS on */
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clrbits_le32(®s->usb.bmcsr, BMCSR_VBUS_OFF);
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/* Disable all interrupts */
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writel(0x00, ®s->usb.bmier);
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writel(0x1f, ®s->usb.bmisr);
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}
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*ret_hccr = hccr;
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*ret_hcor = hcor;
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return 0;
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}
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/*
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* Destroy the appropriate control structures corresponding
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* the the EHCI host controller.
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*/
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int ehci_hcd_stop(int index)
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{
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return 0;
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}
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