u-boot/board/gateworks/gw_ventana/common.h
Tim Harvey 34b080b79c imx: ventana: add fdt fixup to enable UHS-I support on selected boards
UHS-I support is available on Ventana boards with micro-SD sockets depending
on the board revision. For backwards compatibility to not break users
who have old bootloaders and newer kernels the device-tree on boards with
microSD disables UHS-I support by default by defining the no-1-8-v property
in the esdhc controller node. For models/revisions that support switchable
1.8V/3.3V I/O which is detectable by the presence of a pull-down on the
SD3_VSELECT pin we remove that property to enable support in the kernel.

Additionally we add SD3_VSELECT to the pinmux for clarity (even though U-Boot
does not currently support UHS-I modes requiring 1.8V I/O).

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-05-31 17:26:27 +02:00

97 lines
2.5 KiB
C

/*
* Copyright (C) 2013 Gateworks Corporation
*
* Author: Tim Harvey <tharvey@gateworks.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _GWVENTANA_COMMON_H_
#define _GWVENTANA_COMMON_H_
#include "ventana_eeprom.h"
/* GPIO's common to all baseboards */
#define GP_PHY_RST IMX_GPIO_NR(1, 30)
#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
#define GP_SD3_CD IMX_GPIO_NR(7, 0)
#define GP_RS232_EN IMX_GPIO_NR(2, 11)
#define GP_MSATA_SEL IMX_GPIO_NR(2, 8)
#define GP_SD3_VSELECT IMX_GPIO_NR(6, 14)
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define SPI_PAD_CTRL (PAD_CTL_HYS | \
PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
#define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
#define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION)
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
/*
* each baseboard has 4 user configurable Digital IO lines which can
* be pinmuxed as a GPIO or in some cases a PWM
*/
struct dio_cfg {
iomux_v3_cfg_t gpio_padmux[2];
unsigned gpio_param;
iomux_v3_cfg_t pwm_padmux[2];
unsigned pwm_param;
};
struct ventana {
/* pinmux */
iomux_v3_cfg_t const *gpio_pads;
int num_pads;
/* DIO pinmux/val */
struct dio_cfg dio_cfg[4];
int num_gpios;
/* various gpios (0 if non-existent) */
int leds[3];
int pcie_rst;
int mezz_pwren;
int mezz_irq;
int rs485en;
int gps_shdn;
int vidin_en;
int dioi2c_en;
int pcie_sson;
int usb_sel;
int wdis;
int msata_en;
bool usd_vsel;
};
extern struct ventana gpio_cfg[GW_UNKNOWN];
/* configure i2c iomux */
void setup_ventana_i2c(void);
/* configure uart iomux */
void setup_iomux_uart(void);
/* conifgure PMIC */
void setup_pmic(void);
/* configure gpio iomux/defaults */
void setup_iomux_gpio(int board, struct ventana_board_info *);
/* late setup of GPIO (configuration per baseboard and env) */
void setup_board_gpio(int board, struct ventana_board_info *);
#endif /* #ifndef _GWVENTANA_COMMON_H_ */