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b9eebfade9
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam. The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to enable initialization of this hardware IP. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
337 lines
7.3 KiB
C
337 lines
7.3 KiB
C
/*
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* Copyright 2008-2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Based on CAAM driver in drivers/crypto/caam in Linux
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*/
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#include <common.h>
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#include <malloc.h>
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#include "fsl_sec.h"
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#include "jr.h"
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#define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1))
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#define CIRC_SPACE(head, tail, size) CIRC_CNT((tail), (head) + 1, (size))
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struct jobring jr;
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static inline void start_jr0(void)
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{
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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u32 ctpr_ms = sec_in32(&sec->ctpr_ms);
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u32 scfgr = sec_in32(&sec->scfgr);
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if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) {
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/* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or
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* VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SEC_SCFGR_VIRT_EN = 1
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*/
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if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) ||
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(!(ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) &&
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(scfgr & SEC_SCFGR_VIRT_EN)))
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sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0);
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} else {
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/* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
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if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR)
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sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0);
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}
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}
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static inline void jr_reset_liodn(void)
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{
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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sec_out32(&sec->jrliodnr[0].ls, 0);
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}
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static inline void jr_disable_irq(void)
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{
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struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
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uint32_t jrcfg = sec_in32(®s->jrcfg1);
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jrcfg = jrcfg | JR_INTMASK;
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sec_out32(®s->jrcfg1, jrcfg);
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}
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static void jr_initregs(void)
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{
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struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
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phys_addr_t ip_base = virt_to_phys((void *)jr.input_ring);
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phys_addr_t op_base = virt_to_phys((void *)jr.output_ring);
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#ifdef CONFIG_PHYS_64BIT
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sec_out32(®s->irba_h, ip_base >> 32);
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#else
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sec_out32(®s->irba_h, 0x0);
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#endif
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sec_out32(®s->irba_l, (uint32_t)ip_base);
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#ifdef CONFIG_PHYS_64BIT
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sec_out32(®s->orba_h, op_base >> 32);
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#else
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sec_out32(®s->orba_h, 0x0);
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#endif
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sec_out32(®s->orba_l, (uint32_t)op_base);
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sec_out32(®s->ors, JR_SIZE);
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sec_out32(®s->irs, JR_SIZE);
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if (!jr.irq)
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jr_disable_irq();
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}
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static int jr_init(void)
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{
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memset(&jr, 0, sizeof(struct jobring));
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jr.jq_id = DEFAULT_JR_ID;
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jr.irq = DEFAULT_IRQ;
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#ifdef CONFIG_FSL_CORENET
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jr.liodn = DEFAULT_JR_LIODN;
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#endif
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jr.size = JR_SIZE;
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jr.input_ring = (dma_addr_t *)malloc(JR_SIZE * sizeof(dma_addr_t));
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if (!jr.input_ring)
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return -1;
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jr.output_ring =
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(struct op_ring *)malloc(JR_SIZE * sizeof(struct op_ring));
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if (!jr.output_ring)
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return -1;
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memset(jr.input_ring, 0, JR_SIZE * sizeof(dma_addr_t));
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memset(jr.output_ring, 0, JR_SIZE * sizeof(struct op_ring));
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start_jr0();
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jr_initregs();
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return 0;
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}
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static int jr_sw_cleanup(void)
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{
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jr.head = 0;
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jr.tail = 0;
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jr.read_idx = 0;
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jr.write_idx = 0;
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memset(jr.info, 0, sizeof(jr.info));
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memset(jr.input_ring, 0, jr.size * sizeof(dma_addr_t));
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memset(jr.output_ring, 0, jr.size * sizeof(struct op_ring));
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return 0;
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}
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static int jr_hw_reset(void)
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{
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struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
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uint32_t timeout = 100000;
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uint32_t jrint, jrcr;
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sec_out32(®s->jrcr, JRCR_RESET);
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do {
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jrint = sec_in32(®s->jrint);
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} while (((jrint & JRINT_ERR_HALT_MASK) ==
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JRINT_ERR_HALT_INPROGRESS) && --timeout);
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jrint = sec_in32(®s->jrint);
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if (((jrint & JRINT_ERR_HALT_MASK) !=
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JRINT_ERR_HALT_INPROGRESS) && timeout == 0)
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return -1;
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timeout = 100000;
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sec_out32(®s->jrcr, JRCR_RESET);
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do {
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jrcr = sec_in32(®s->jrcr);
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} while ((jrcr & JRCR_RESET) && --timeout);
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if (timeout == 0)
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return -1;
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return 0;
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}
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/* -1 --- error, can't enqueue -- no space available */
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static int jr_enqueue(uint32_t *desc_addr,
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void (*callback)(uint32_t desc, uint32_t status, void *arg),
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void *arg)
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{
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struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
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int head = jr.head;
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dma_addr_t desc_phys_addr = virt_to_phys(desc_addr);
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if (sec_in32(®s->irsa) == 0 ||
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CIRC_SPACE(jr.head, jr.tail, jr.size) <= 0)
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return -1;
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jr.input_ring[head] = desc_phys_addr;
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jr.info[head].desc_phys_addr = desc_phys_addr;
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jr.info[head].desc_addr = (uint32_t)desc_addr;
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jr.info[head].callback = (void *)callback;
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jr.info[head].arg = arg;
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jr.info[head].op_done = 0;
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jr.head = (head + 1) & (jr.size - 1);
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sec_out32(®s->irja, 1);
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return 0;
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}
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static int jr_dequeue(void)
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{
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struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
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int head = jr.head;
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int tail = jr.tail;
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int idx, i, found;
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void (*callback)(uint32_t desc, uint32_t status, void *arg);
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void *arg = NULL;
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while (sec_in32(®s->orsf) && CIRC_CNT(jr.head, jr.tail, jr.size)) {
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found = 0;
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dma_addr_t op_desc = jr.output_ring[jr.tail].desc;
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uint32_t status = jr.output_ring[jr.tail].status;
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uint32_t desc_virt;
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for (i = 0; CIRC_CNT(head, tail + i, jr.size) >= 1; i++) {
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idx = (tail + i) & (jr.size - 1);
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if (op_desc == jr.info[idx].desc_phys_addr) {
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desc_virt = jr.info[idx].desc_addr;
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found = 1;
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break;
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}
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}
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/* Error condition if match not found */
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if (!found)
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return -1;
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jr.info[idx].op_done = 1;
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callback = (void *)jr.info[idx].callback;
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arg = jr.info[idx].arg;
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/* When the job on tail idx gets done, increment
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* tail till the point where job completed out of oredr has
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* been taken into account
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*/
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if (idx == tail)
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do {
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tail = (tail + 1) & (jr.size - 1);
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} while (jr.info[tail].op_done);
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jr.tail = tail;
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jr.read_idx = (jr.read_idx + 1) & (jr.size - 1);
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sec_out32(®s->orjr, 1);
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jr.info[idx].op_done = 0;
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callback(desc_virt, status, arg);
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}
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return 0;
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}
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static void desc_done(uint32_t desc, uint32_t status, void *arg)
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{
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struct result *x = arg;
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x->status = status;
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caam_jr_strstatus(status);
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x->done = 1;
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}
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int run_descriptor_jr(uint32_t *desc)
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{
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unsigned long long timeval = get_ticks();
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unsigned long long timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
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struct result op;
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int ret = 0;
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memset(&op, sizeof(op), 0);
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ret = jr_enqueue(desc, desc_done, &op);
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if (ret) {
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debug("Error in SEC enq\n");
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ret = JQ_ENQ_ERR;
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goto out;
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}
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timeval = get_ticks();
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timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
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while (op.done != 1) {
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ret = jr_dequeue();
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if (ret) {
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debug("Error in SEC deq\n");
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ret = JQ_DEQ_ERR;
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goto out;
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}
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if ((get_ticks() - timeval) > timeout) {
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debug("SEC Dequeue timed out\n");
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ret = JQ_DEQ_TO_ERR;
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goto out;
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}
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}
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if (!op.status) {
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debug("Error %x\n", op.status);
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ret = op.status;
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}
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out:
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return ret;
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}
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int jr_reset(void)
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{
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if (jr_hw_reset() < 0)
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return -1;
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/* Clean up the jobring structure maintained by software */
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jr_sw_cleanup();
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return 0;
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}
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int sec_reset(void)
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{
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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uint32_t mcfgr = sec_in32(&sec->mcfgr);
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uint32_t timeout = 100000;
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mcfgr |= MCFGR_SWRST;
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sec_out32(&sec->mcfgr, mcfgr);
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mcfgr |= MCFGR_DMA_RST;
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sec_out32(&sec->mcfgr, mcfgr);
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do {
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mcfgr = sec_in32(&sec->mcfgr);
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} while ((mcfgr & MCFGR_DMA_RST) == MCFGR_DMA_RST && --timeout);
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if (timeout == 0)
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return -1;
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timeout = 100000;
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do {
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mcfgr = sec_in32(&sec->mcfgr);
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} while ((mcfgr & MCFGR_SWRST) == MCFGR_SWRST && --timeout);
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if (timeout == 0)
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return -1;
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return 0;
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}
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int sec_init(void)
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{
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int ret = 0;
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#ifdef CONFIG_PHYS_64BIT
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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uint32_t mcr = sec_in32(&sec->mcfgr);
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sec_out32(&sec->mcfgr, mcr | 1 << MCFGR_PS_SHIFT);
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#endif
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ret = jr_init();
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if (ret < 0)
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return -1;
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return ret;
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}
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