mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-27 15:12:21 +00:00
63e73c9a8e
- update board/emk tree; use common flash driver - Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c [adapted for other PPC CPUs -- wd] - Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c * Patch by Jon Diekema, 13 Feb 2004: Call show_boot_progress() whenever POST "FAILED" is printed. * Patch by Nishant Kamat, 13 Feb 2004: Add support for TI OMAP1610 H2 Board Fixes for cpu/arm926ejs/interrupt.c (based on Richard Woodruff's patch for arm925, 16 Oct 03) Fix for a timer bug in OMAP1610 Innovator Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2 * Patches by Stephan Linz, 12 Feb 2004: - add support for NIOS timer with variable period preload counter value - prepare POST framework support for NIOS targets * Patch by Denis Peter, 11 Feb 2004: add POST support for the MIP405 board
237 lines
5.5 KiB
C
237 lines
5.5 KiB
C
/*
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* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Andreas Heppel <aheppel@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Date & Time support for the MK48T59 RTC
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*/
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#undef RTC_DEBUG
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#include <common.h>
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#include <command.h>
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#include <config.h>
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#include <rtc.h>
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#include <mk48t59.h>
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#if defined(CONFIG_RTC_MK48T59)
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#if defined(CONFIG_BAB7xx)
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static uchar rtc_read (short reg)
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{
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out8(RTC_PORT_ADDR0, reg & 0xFF);
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out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
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return in8(RTC_PORT_DATA);
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}
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static void rtc_write (short reg, uchar val)
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{
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out8(RTC_PORT_ADDR0, reg & 0xFF);
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out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
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out8(RTC_PORT_DATA, val);
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}
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#elif defined(CONFIG_PCIPPC2)
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#include "../board/pcippc2/pcippc2.h"
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static uchar rtc_read (short reg)
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{
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return in8(RTC(reg));
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}
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static void rtc_write (short reg, uchar val)
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{
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out8(RTC(reg),val);
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}
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#elif defined(CONFIG_AMIGAONEG3SE)
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#include "../board/MAI/AmigaOneG3SE/via686.h"
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#include "../board/MAI/AmigaOneG3SE/memio.h"
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static uchar rtc_read (short reg)
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{
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out_byte(CMOS_ADDR, (uint8)reg);
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return in_byte(CMOS_DATA);
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}
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static void rtc_write (short reg, uchar val)
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{
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out_byte(CMOS_ADDR, (uint8)reg);
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out_byte(CMOS_DATA, (uint8)val);
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}
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#elif defined(CONFIG_EVAL5200)
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static uchar rtc_read (short reg)
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{
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return in8(RTC(reg));
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}
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static void rtc_write (short reg, uchar val)
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{
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out8(RTC(reg),val);
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}
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#else
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# error Board specific rtc access functions should be supplied
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#endif
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static unsigned bcd2bin (uchar n)
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{
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return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
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}
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static unsigned char bin2bcd (unsigned int n)
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{
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return (((n / 10) << 4) | (n % 10));
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}
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/* ------------------------------------------------------------------------- */
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void *nvram_read(void *dest, const short src, size_t count)
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{
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uchar *d = (uchar *) dest;
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short s = src;
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while (count--)
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*d++ = rtc_read(s++);
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return dest;
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}
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void nvram_write(short dest, const void *src, size_t count)
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{
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short d = dest;
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uchar *s = (uchar *) src;
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while (count--)
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rtc_write(d++, *s++);
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}
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#if (CONFIG_COMMANDS & CFG_CMD_DATE)
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/* ------------------------------------------------------------------------- */
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void rtc_get (struct rtc_time *tmp)
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{
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uchar save_ctrl_a;
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uchar sec, min, hour, mday, wday, mon, year;
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/* Simple: freeze the clock, read it and allow updates again */
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save_ctrl_a = rtc_read(RTC_CONTROLA);
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/* Set the register to read the value. */
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save_ctrl_a |= RTC_CA_READ;
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rtc_write(RTC_CONTROLA, save_ctrl_a);
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sec = rtc_read (RTC_SECONDS);
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min = rtc_read (RTC_MINUTES);
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hour = rtc_read (RTC_HOURS);
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mday = rtc_read (RTC_DAY_OF_MONTH);
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wday = rtc_read (RTC_DAY_OF_WEEK);
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mon = rtc_read (RTC_MONTH);
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year = rtc_read (RTC_YEAR);
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/* re-enable update */
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save_ctrl_a &= ~RTC_CA_READ;
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rtc_write(RTC_CONTROLA, save_ctrl_a);
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#ifdef RTC_DEBUG
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printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
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"hr: %02x min: %02x sec: %02x\n",
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year, mon, mday, wday,
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hour, min, sec );
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#endif
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tmp->tm_sec = bcd2bin (sec & 0x7F);
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tmp->tm_min = bcd2bin (min & 0x7F);
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tmp->tm_hour = bcd2bin (hour & 0x3F);
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tmp->tm_mday = bcd2bin (mday & 0x3F);
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tmp->tm_mon = bcd2bin (mon & 0x1F);
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tmp->tm_year = bcd2bin (year);
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tmp->tm_wday = bcd2bin (wday & 0x07);
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if(tmp->tm_year<70)
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tmp->tm_year+=2000;
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else
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tmp->tm_year+=1900;
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tmp->tm_yday = 0;
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tmp->tm_isdst= 0;
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#ifdef RTC_DEBUG
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printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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#endif
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}
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void rtc_set (struct rtc_time *tmp)
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{
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uchar save_ctrl_a;
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#ifdef RTC_DEBUG
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printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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#endif
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save_ctrl_a = rtc_read(RTC_CONTROLA);
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save_ctrl_a |= RTC_CA_WRITE;
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rtc_write(RTC_CONTROLA, save_ctrl_a); /* disables the RTC to update the regs */
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rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100));
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rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon));
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rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
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rtc_write (RTC_DAY_OF_MONTH, bin2bcd(tmp->tm_mday));
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rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour));
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rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min ));
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rtc_write (RTC_SECONDS, bin2bcd(tmp->tm_sec ));
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save_ctrl_a &= ~RTC_CA_WRITE;
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rtc_write(RTC_CONTROLA, save_ctrl_a); /* enables the RTC to update the regs */
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}
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void rtc_reset (void)
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{
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uchar control_b;
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/*
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* Start oscillator here.
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*/
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control_b = rtc_read(RTC_CONTROLB);
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control_b &= ~RTC_CB_STOP;
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rtc_write(RTC_CONTROLB, control_b);
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}
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void rtc_set_watchdog(short multi, short res)
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{
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uchar wd_value;
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wd_value = RTC_WDS | ((multi & 0x1F) << 2) | (res & 0x3);
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rtc_write(RTC_WATCHDOG, wd_value);
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}
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#endif /* (CONFIG_COMMANDS & CFG_CMD_DATE) */
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#endif /* CONFIG_RTC_MK48T59 */
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