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https://github.com/AsahiLinux/u-boot
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427eba706c
This patch adds lpuart support for Vybrid VF610 platform. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Alison Wang <b18965@freescale.com>
132 lines
2.9 KiB
C
132 lines
2.9 KiB
C
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/io.h>
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#include <serial.h>
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#include <linux/compiler.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#define US1_TDRE (1 << 7)
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#define US1_RDRF (1 << 5)
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#define UC2_TE (1 << 3)
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#define UC2_RE (1 << 2)
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DECLARE_GLOBAL_DATA_PTR;
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struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE;
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static void lpuart_serial_setbrg(void)
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{
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u32 clk = mxc_get_clock(MXC_UART_CLK);
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u16 sbr;
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if (!gd->baudrate)
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gd->baudrate = CONFIG_BAUDRATE;
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sbr = (u16)(clk / (16 * gd->baudrate));
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/* place adjustment later - n/32 BRFA */
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__raw_writeb(sbr >> 8, &base->ubdh);
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__raw_writeb(sbr & 0xff, &base->ubdl);
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}
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static int lpuart_serial_getc(void)
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{
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u8 status;
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while (!(__raw_readb(&base->us1) & US1_RDRF))
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WATCHDOG_RESET();
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status = __raw_readb(&base->us1);
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status |= US1_RDRF;
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__raw_writeb(status, &base->us1);
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return __raw_readb(&base->ud);
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}
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static void lpuart_serial_putc(const char c)
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{
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if (c == '\n')
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serial_putc('\r');
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while (!(__raw_readb(&base->us1) & US1_TDRE))
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WATCHDOG_RESET();
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__raw_writeb(c, &base->ud);
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}
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/*
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* Test whether a character is in the RX buffer
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*/
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static int lpuart_serial_tstc(void)
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{
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if (__raw_readb(&base->urcfifo) == 0)
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return 0;
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return 1;
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}
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/*
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* Initialise the serial port with the given baudrate. The settings
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* are always 8 data bits, no parity, 1 stop bit, no start bits.
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*/
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static int lpuart_serial_init(void)
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{
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u8 ctrl;
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ctrl = __raw_readb(&base->uc2);
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ctrl &= ~UC2_RE;
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ctrl &= ~UC2_TE;
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__raw_writeb(ctrl, &base->uc2);
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__raw_writeb(0, &base->umodem);
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__raw_writeb(0, &base->uc1);
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/* provide data bits, parity, stop bit, etc */
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serial_setbrg();
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__raw_writeb(UC2_RE | UC2_TE, &base->uc2);
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return 0;
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}
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static struct serial_device lpuart_serial_drv = {
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.name = "lpuart_serial",
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.start = lpuart_serial_init,
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.stop = NULL,
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.setbrg = lpuart_serial_setbrg,
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.putc = lpuart_serial_putc,
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.puts = default_serial_puts,
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.getc = lpuart_serial_getc,
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.tstc = lpuart_serial_tstc,
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};
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void lpuart_serial_initialize(void)
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{
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serial_register(&lpuart_serial_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &lpuart_serial_drv;
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}
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