Sean Anderson b8bc120927 riscv: Add option to support RISC-V privileged spec 1.9 ... Some older processors (notably the Kendryte K210) use an older version of the RISC-V privileged specification. The primary changes between the old and new are in virtual memory, and in the merging of three separate counter enable CSRs. Using the new CSR on an old processor causes an illegal instruction exception. This patch adds an option to use the old CSRs instead of the new one. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2020-07-01 15:01:22 +08:00
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arch-fu540	riscv: sifive: fu540: add SPL configuration	2020-06-04 09:44:09 +08:00
arch-generic	gpio: sifive: add support for DM based gpio driver for FU540-SoC	2019-10-18 09:04:01 +08:00
asm.h	riscv: Sync csr.h with Linux kernel v5.2	2019-08-15 13:42:28 +08:00
barrier.h	riscv: make use of the barrier functions from Linux	2018-11-26 13:57:30 +08:00
bitops.h	riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()	2018-05-15 21:44:05 -04:00
byteorder.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
cache.h	riscv: cache: Implement i/dcache [status, enable, disable]	2018-11-26 13:58:01 +08:00
config.h	riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd	2019-02-27 09:12:34 +08:00
csr.h	riscv: Add option to support RISC-V privileged spec 1.9	2020-07-01 15:01:22 +08:00
dma-mapping.h	dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>	2020-02-19 21:27:30 +08:00
encoding.h	common: Drop linux/bitops.h from common header	2020-05-18 21:19:23 -04:00
global_data.h	riscv: Add headers for asm/global_data.h	2020-07-01 15:01:21 +08:00
gpio.h	gpio: sifive: add support for DM based gpio driver for FU540-SoC	2019-10-18 09:04:01 +08:00
io.h	riscv: do not reimplement generic io functions	2018-11-26 13:57:30 +08:00
linkage.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
posix_types.h	riscv: fix use of incorrectly sized variables	2018-11-26 13:57:29 +08:00
processor.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
ptrace.h	riscv: checkpatch: Fix alignment should match open parenthesis	2018-03-30 13:13:22 +08:00
sbi.h	riscv: sbi: Remove sbi_spec_version	2020-06-04 09:44:21 +08:00
sections.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
setjmp.h	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
smp.h	riscv: Clean up IPI initialization code	2020-07-01 15:01:22 +08:00
spl.h	riscv: add SPL support	2019-08-26 16:07:42 +08:00
string.h	riscv: checkpatch: Fix Macro argument reuse	2018-03-30 13:13:22 +08:00
syscon.h	riscv: Add a SYSCON driver for Andestech's PLMT	2019-04-08 09:45:08 +08:00
system.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
types.h	riscv: fix use of incorrectly sized variables	2018-11-26 13:57:29 +08:00
u-boot-riscv.h	riscv: Provide a mechanism to fix DT for reserved memory	2020-04-23 10:14:16 +08:00
u-boot.h	bdinfo: riscv: Use generic bd_info	2020-06-25 13:24:10 -04:00
unaligned.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00