Duncan Laurie b83058cd23 x86: Issue SMI to finalize Coreboot in final stage ... This will write magic value to APMC command port which will trigger an SMI and cause coreboot to lock down the ME, chipset, and CPU. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>		2012-12-06 14:30:43 -08:00
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cpu	x86: Issue SMI to finalize Coreboot in final stage	2012-12-06 14:30:43 -08:00
dts	x86: fdt: Create basic .dtsi file for coreboot	2012-12-06 14:30:42 -08:00
include/asm	x86: Add back cold- and warm-boot flags	2012-12-06 14:30:42 -08:00
lib	x86: Add support for CONFIG_OF_CONTROL	2012-12-06 14:30:42 -08:00
config.mk	x86: Wrap small helper functions from libgcc to avoid an ABI mismatch	2011-11-29 21:31:24 +11:00