u-boot/arch/x86/dts
Bin Meng 728b393f3b x86: Add SPI support to quark/galileo
The Quark SoC contains a legacy SPI controller in the legacy bridge
which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS
control register offset in the ICH SPI driver is wrong for the Quark
SoC too, unprotect_spi_flash() is added to enable the flash write.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:45 -07:00
..
include Makefile: Support include files for .dts files 2014-06-20 11:55:03 -06:00
microcode x86: Add support for Intel Minnowboard Max 2015-02-06 12:07:39 -07:00
.gitignore dts: generate multiple device tree blobs 2014-02-19 11:10:05 -05:00
chromebook_link.dts x86: dts: Add SPI flash MRC details for chromebook_link 2015-01-24 06:13:45 -07:00
crownbay.dts x86: crownbay: Add pci devices in the dts file 2015-01-13 07:24:57 -08:00
galileo.dts x86: Add SPI support to quark/galileo 2015-02-06 12:07:45 -07:00
Makefile x86: Add basic Intel Galileo board support 2015-02-06 12:07:41 -07:00
minnowmax.dts x86: Add support for Intel Minnowboard Max 2015-02-06 12:07:39 -07:00
serial.dtsi x86: Add support for Intel Minnowboard Max 2015-02-06 12:07:39 -07:00
skeleton.dtsi x86: fdt: Create basic .dtsi file for coreboot 2012-12-06 14:30:42 -08:00