Jacky Bai b80ec768a3 imx8ulp:ddr: saving the dram config timing data into sram ... On i.MX8ULP, The dram config timing need to be saved into sram for ddr retention when APD enter PD mode, so add this support on i.MX8ULP. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>		2022-02-05 13:38:39 +01:00
..
altera	drivers/ddr/altera/sequencer.c: Fix spelling of "resetting".	2022-01-13 07:57:50 -05:00
fsl	Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig	2021-12-01 10:58:10 -05:00
imx	imx8ulp:ddr: saving the dram config timing data into sram	2022-02-05 13:38:39 +01:00
marvell	ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision	2022-01-14 11:39:15 +01:00
microchip	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
Kconfig	nxp: Migrate CONFIG_DDR_CLK_FREQ to Kconfig	2021-08-31 17:46:37 -04:00