mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-19 09:43:08 +00:00
ac8b36938a
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop these from platforms that we can. Signed-off-by: Tom Rini <trini@konsulko.com>
80 lines
2.2 KiB
C
80 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Bluewater Systems Snapper 9260 and 9G20 modules
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*
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* (C) Copyright 2011 Bluewater Systems
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* Author: Andre Renaud <andre@bluewatersys.com>
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* Author: Ryan Mallon <ryan@bluewatersys.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* SoC type is defined in boards.cfg */
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#include <asm/hardware.h>
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#include <linux/sizes.h>
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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/* CPU */
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
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#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
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/* Mem test settings */
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/* NAND Flash */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
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/* GPIOs and IO expander */
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#define CONFIG_PCA953X
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#define CONFIG_SYS_I2C_PCA953X_ADDR 0x28
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#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} }
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/* UARTs/Serial console */
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#ifndef CONFIG_DM_SERIAL
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#endif
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/* I2C - Bit-bashed */
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#define CONFIG_SOFT_I2C_READ_REPEATED_START
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#define I2C_INIT do { \
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at91_set_gpio_output(AT91_PIN_PA23, 1); \
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at91_set_gpio_output(AT91_PIN_PA24, 1); \
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at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
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at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
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} while (0)
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#define I2C_SOFT_DECLARATIONS
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#define I2C_ACTIVE
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#define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1);
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#define I2C_READ at91_get_gpio_value(AT91_PIN_PA23);
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#define I2C_SDA(bit) do { \
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if (bit) { \
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at91_set_gpio_input(AT91_PIN_PA23, 1); \
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} else { \
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at91_set_gpio_output(AT91_PIN_PA23, 1); \
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at91_set_gpio_value(AT91_PIN_PA23, bit); \
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} \
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} while (0)
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#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
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#define I2C_DELAY udelay(2)
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/* Boot options */
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/* Environment settings */
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/* Console settings */
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#endif /* __CONFIG_H */
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