mirror of
https://github.com/AsahiLinux/u-boot
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d4d7730853
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
72 lines
2 KiB
C
72 lines
2 KiB
C
/*
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* blackfin-config-post.h - setup common defines for Blackfin boards based on config.h
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*
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* Copyright (c) 2007 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ASM_BLACKFIN_CONFIG_POST_H__
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#define __ASM_BLACKFIN_CONFIG_POST_H__
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/* Check to make sure everything fits in external RAM */
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#if ((CFG_MONITOR_BASE + CFG_MONITOR_LEN) > CFG_MAX_RAM_SIZE)
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# error Memory Map does not fit into configuration
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#endif
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/* Sanity check BFIN_CPU */
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#ifndef BFIN_CPU
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# error BFIN_CPU: your board config needs to define this
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#endif
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/* Make sure the structure is properly aligned */
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#if ((CFG_GBL_DATA_ADDR & -4) != CFG_GBL_DATA_ADDR)
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# error CFG_GBL_DATA_ADDR: must be 4 byte aligned
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#endif
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/* Set default CONFIG_VCO_HZ if need be */
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#if !defined(CONFIG_VCO_HZ)
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# if (CONFIG_CLKIN_HALF == 0)
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# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
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# else
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# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2)
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# endif
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#endif
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/* Set default CONFIG_CCLK_HZ if need be */
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#if !defined(CONFIG_CCLK_HZ)
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# if (CONFIG_PLL_BYPASS == 0)
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# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV)
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# else
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# define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
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# endif
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#endif
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/* Set default CONFIG_SCLK_HZ if need be */
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#if !defined(CONFIG_SCLK_HZ)
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# if (CONFIG_PLL_BYPASS == 0)
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# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV)
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# else
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# define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
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# endif
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#endif
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/* Since we use these to program PLL registers directly,
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* make sure the values are sane and won't screw us up.
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*/
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#if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT
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# error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63)
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#endif
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#if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF
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# error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1
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#endif
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#if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS
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# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1
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#endif
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/* Using L1 scratch pad makes sense for everyone by default. */
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#ifndef CMD_LINE_ADDR
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# define CMD_LINE_ADDR L1_SRAM_SCRATCH
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#endif
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#endif
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