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c7be3e5a79
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
64 lines
1.3 KiB
C
64 lines
1.3 KiB
C
/*
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* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <asm/arch/gxbb.h>
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#include <asm/arch/sm.h>
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#include <asm/arch/eth.h>
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#include <asm/arch/mem.h>
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#define EFUSE_SN_OFFSET 20
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#define EFUSE_SN_SIZE 16
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#define EFUSE_MAC_OFFSET 52
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#define EFUSE_MAC_SIZE 6
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int board_init(void)
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{
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return 0;
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}
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int misc_init_r(void)
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{
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u8 mac_addr[EFUSE_MAC_SIZE];
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char serial[EFUSE_SN_SIZE];
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ssize_t len;
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meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
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/* Enable power and clock gate */
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setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
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/* Reset PHY on GPIOZ_14 */
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clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
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clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
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mdelay(10);
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setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
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if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
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len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
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mac_addr, EFUSE_MAC_SIZE);
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if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
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eth_env_set_enetaddr("ethaddr", mac_addr);
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}
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if (!env_get("serial#")) {
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len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
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EFUSE_SN_SIZE);
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if (len == EFUSE_SN_SIZE)
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env_set("serial#", serial);
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}
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return 0;
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}
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int ft_board_setup(void *blob, bd_t *bd)
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{
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meson_gx_init_reserved_memory(blob);
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return 0;
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}
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