mirror of
https://github.com/AsahiLinux/u-boot
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25a5818ff8
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
116 lines
2.8 KiB
C
116 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2002 (440 port)
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* Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
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*
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* (C) Copyright 2003 Motorola Inc. (MPC85xx port)
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* Xianghua Xiao (X.Xiao@motorola.com)
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*
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* (C) Copyright 2004, 2007 Freescale Semiconductor. (MPC86xx Port)
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*/
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#include <common.h>
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#include <irq_func.h>
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#include <log.h>
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#include <mpc86xx.h>
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#include <command.h>
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#include <time.h>
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#include <asm/processor.h>
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#ifdef CONFIG_POST
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#include <post.h>
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#endif
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#include <asm/ptrace.h>
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void interrupt_init_cpu(unsigned *decrementer_count)
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{
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volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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volatile ccsr_pic_t *pic = &immr->im_pic;
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#ifdef CONFIG_POST
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/*
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* The POST word is stored in the PIC's TFRR register which gets
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* cleared when the PIC is reset. Save it off so we can restore it
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* later.
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*/
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ulong post_word = post_word_load();
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#endif
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pic->gcr = MPC86xx_PICGCR_RST;
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while (pic->gcr & MPC86xx_PICGCR_RST)
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;
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pic->gcr = MPC86xx_PICGCR_MODE;
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*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
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debug("interrupt init: tbclk() = %ld MHz, decrementer_count = %d\n",
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(get_tbclk() / 1000000),
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*decrementer_count);
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#ifdef CONFIG_INTERRUPTS
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pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */
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debug("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1);
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pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
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debug("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2);
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pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
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debug("iivpr3@%p = %x\n", &pic->iivpr3, pic->iivpr3);
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#if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1)
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pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */
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debug("iivpr8@%p = %x\n", &pic->iivpr8, pic->iivpr8);
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#endif
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#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
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pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */
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debug("iivpr9@%p = %x\n", &pic->iivpr9, pic->iivpr9);
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#endif
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pic->ctpr = 0; /* 40080 clear current task priority register */
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#endif
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#ifdef CONFIG_POST
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post_word_store(post_word);
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#endif
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}
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/*
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* timer_interrupt - gets called when the decrementer overflows,
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* with interrupts disabled.
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* Trivial implementation - no need to be really accurate.
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*/
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void timer_interrupt_cpu(struct pt_regs *regs)
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{
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/* nothing to do here */
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}
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/*
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* Install and free a interrupt handler. Not implemented yet.
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*/
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void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
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{
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}
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void irq_free_handler(int vec)
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{
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}
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/*
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* irqinfo - print information about PCI devices,not implemented.
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*/
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int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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{
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return 0;
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}
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/*
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* Handle external interrupts
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*/
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void external_interrupt(struct pt_regs *regs)
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{
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puts("external_interrupt(oops!)\n");
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}
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