mirror of
https://github.com/AsahiLinux/u-boot
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304 lines
6.8 KiB
C
304 lines
6.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Kontron Electronics GmbH
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*/
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#include <asm/arch/imx8mm_pins.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/ddr.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <dm/uclass.h>
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#include <dm/device.h>
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#include <dm/uclass-internal.h>
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#include <dm/device-internal.h>
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#include <hang.h>
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#include <i2c.h>
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#include <init.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <power/pca9450.h>
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#include <power/pmic.h>
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#include <spl.h>
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DECLARE_GLOBAL_DATA_PTR;
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enum {
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BOARD_TYPE_KTN_N801X,
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BOARD_TYPE_KTN_N801X_LVDS,
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BOARD_TYPE_MAX
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};
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#define GPIO_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
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#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
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#define TOUCH_RESET_GPIO IMX_GPIO_NR(3, 23)
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static iomux_v3_cfg_t const i2c1_pads[] = {
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IMX8MM_PAD_I2C1_SCL_I2C1_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION,
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IMX8MM_PAD_I2C1_SDA_I2C1_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION
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};
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static iomux_v3_cfg_t const i2c2_pads[] = {
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IMX8MM_PAD_I2C2_SCL_I2C2_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION,
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IMX8MM_PAD_I2C2_SDA_I2C2_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION
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};
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static iomux_v3_cfg_t const touch_gpio[] = {
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IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL)
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};
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int spl_board_boot_device(enum boot_device boot_dev_spl)
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{
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switch (boot_dev_spl) {
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case USB_BOOT:
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return BOOT_DEVICE_BOARD;
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case SPI_NOR_BOOT:
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return BOOT_DEVICE_SPI;
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case SD1_BOOT:
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case MMC1_BOOT:
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return BOOT_DEVICE_MMC1;
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case SD2_BOOT:
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case MMC2_BOOT:
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return BOOT_DEVICE_MMC2;
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default:
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return BOOT_DEVICE_NONE;
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}
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}
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bool check_ram_available(long size)
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{
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long sz = get_ram_size((long *)PHYS_SDRAM, size);
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if (sz == size)
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return true;
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return false;
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}
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static void spl_dram_init(void)
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{
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u32 size = 0;
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/*
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* Try the default DDR settings in lpddr4_timing.c to
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* comply with the Micron 4GB DDR.
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*/
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if (!ddr_init(&dram_timing) && check_ram_available(SZ_4G)) {
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size = 4;
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} else {
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/*
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* Overwrite some values to comply with the Micron 1GB/2GB DDRs.
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*/
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dram_timing.ddrc_cfg[2].val = 0xa1080020;
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dram_timing.ddrc_cfg[37].val = 0x1f;
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dram_timing.fsp_msg[0].fsp_cfg[9].val = 0x110;
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dram_timing.fsp_msg[0].fsp_cfg[21].val = 0x1;
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dram_timing.fsp_msg[1].fsp_cfg[10].val = 0x110;
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dram_timing.fsp_msg[1].fsp_cfg[22].val = 0x1;
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dram_timing.fsp_msg[2].fsp_cfg[10].val = 0x110;
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dram_timing.fsp_msg[2].fsp_cfg[22].val = 0x1;
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dram_timing.fsp_msg[3].fsp_cfg[10].val = 0x110;
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dram_timing.fsp_msg[3].fsp_cfg[22].val = 0x1;
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if (!ddr_init(&dram_timing)) {
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if (check_ram_available(SZ_2G))
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size = 2;
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else if (check_ram_available(SZ_1G))
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size = 1;
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}
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}
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if (size == 0) {
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printf("Failed to initialize DDR RAM!\n");
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size = 1;
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}
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printf("Kontron SL i.MX8MM (N801X) module, %u GB RAM detected\n", size);
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writel(size, M4_BOOTROM_BASE_ADDR);
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}
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static void touch_reset(void)
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{
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/*
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* Toggle the reset of the touch panel.
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*/
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imx_iomux_v3_setup_multiple_pads(touch_gpio, ARRAY_SIZE(touch_gpio));
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gpio_request(TOUCH_RESET_GPIO, "touch_reset");
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gpio_direction_output(TOUCH_RESET_GPIO, 0);
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mdelay(20);
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gpio_direction_output(TOUCH_RESET_GPIO, 1);
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mdelay(20);
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}
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static int i2c_detect(u8 bus, u16 addr)
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{
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struct udevice *udev;
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int ret;
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/*
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* Try to probe the touch controller to check if an LVDS panel is
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* connected.
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*/
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ret = i2c_get_chip_for_busnum(bus, addr, 0, &udev);
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if (ret == 0)
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return 0;
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return 1;
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}
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int do_board_detect(void)
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{
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bool lvds = false;
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/*
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* Check the I2C touch controller to detect a LVDS panel.
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*/
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imx_iomux_v3_setup_multiple_pads(i2c2_pads, ARRAY_SIZE(i2c2_pads));
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touch_reset();
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if (i2c_detect(1, 0x5d) == 0) {
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printf("Touch controller detected, assuming LVDS panel...\n");
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lvds = true;
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}
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/*
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* Check the I2C PMIC to detect the deprecated SoM with DA9063.
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*/
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imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
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if (i2c_detect(0, 0x58) == 0) {
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printf("### ATTENTION: DEPRECATED SOM REVISION (N8010 Rev0) DETECTED! ###\n");
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printf("### THIS HW IS NOT SUPPRTED AND BOOTING WILL PROBABLY FAIL ###\n");
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printf("### PLEASE UPGRADE TO LATEST MODULE ###\n");
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}
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if (lvds)
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gd->board_type = BOARD_TYPE_KTN_N801X_LVDS;
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else
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gd->board_type = BOARD_TYPE_KTN_N801X;
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return 0;
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}
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int board_fit_config_name_match(const char *name)
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{
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if (gd->board_type == BOARD_TYPE_KTN_N801X_LVDS && is_imx8mm() &&
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!strncmp(name, "imx8mm-kontron-n801x-s-lvds", 27))
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return 0;
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if (gd->board_type == BOARD_TYPE_KTN_N801X && is_imx8mm() &&
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!strncmp(name, "imx8mm-kontron-n801x-s", 22))
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return 0;
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return -1;
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}
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void spl_board_init(void)
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{
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struct udevice *dev;
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int ret;
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if (IS_ENABLED(CONFIG_FSL_CAAM)) {
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ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
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if (ret)
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printf("Failed to initialize %s: %d\n", dev->name, ret);
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}
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puts("Normal Boot\n");
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ret = uclass_get_device_by_name(UCLASS_CLK,
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"clock-controller@30380000",
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&dev);
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if (ret < 0)
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printf("Failed to find clock node. Check device tree\n");
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}
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static int power_init_board(void)
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{
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struct udevice *dev;
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int ret = pmic_get("pmic@25", &dev);
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if (ret == -ENODEV)
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puts("No pmic found\n");
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if (ret)
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return ret;
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/* BUCKxOUT_DVS0/1 control BUCK123 output, clear PRESET_EN */
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pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
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/* increase VDD_DRAM to 0.95V for 1.5GHz DDR */
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pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1c);
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/* set VDD_SNVS_0V8 from default 0.85V to 0.8V */
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pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
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/* set WDOG_B_CFG to cold reset */
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pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
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return 0;
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}
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void board_init_f(ulong dummy)
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{
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int ret;
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arch_cpu_init();
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init_uart_clk(2);
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timer_init();
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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ret = spl_init();
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if (ret) {
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debug("spl_init() failed: %d\n", ret);
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hang();
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}
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preloader_console_init();
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enable_tzc380();
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/* PMIC initialization */
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power_init_board();
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/* DDR initialization */
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spl_dram_init();
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/* Detect the board type */
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do_board_detect();
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board_init_r(NULL, 0);
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}
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void board_boot_order(u32 *spl_boot_list)
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{
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u32 bootdev = spl_boot_device();
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/*
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* The default boot fuse settings use the SD card (MMC2) as primary
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* boot device, but allow SPI NOR as a fallback boot device.
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* We can't detect the fallback case and spl_boot_device() will return
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* BOOT_DEVICE_MMC2 despite the actual boot device being SPI NOR.
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* Therefore we try to load U-Boot proper vom SPI NOR after loading
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* from MMC has failed.
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*/
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spl_boot_list[0] = bootdev;
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switch (bootdev) {
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case BOOT_DEVICE_MMC1:
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case BOOT_DEVICE_MMC2:
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spl_boot_list[1] = BOOT_DEVICE_SPI;
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break;
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}
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}
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