mirror of
https://github.com/AsahiLinux/u-boot
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323d1f9d5b
Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled. Each SoC has its own defconfig file
for the build-test coverage. Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.
Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture. In fact, some
SoCs of UniPhier family are very similar:
- PH1-LD4 and PH1-sLD8
- PH1-LD6b and ProXstream2 (will be added in the upcoming commit)
This commit will be helpful to merge some defconfig files for better
maintainability.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
263 lines
7.5 KiB
C
263 lines
7.5 KiB
C
/*
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* Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* U-boot - Common settings for UniPhier Family */
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#ifndef __CONFIG_UNIPHIER_COMMON_H__
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#define __CONFIG_UNIPHIER_COMMON_H__
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#define CONFIG_I2C_EEPROM
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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#ifdef CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE
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#define CONFIG_SYS_NS16550_CLK 12288000
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#define CONFIG_SYS_NS16550_REG_SIZE -2
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#endif
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/* TODO: move to Kconfig and device tree */
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#if 0
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#define CONFIG_SYS_NS16550_SERIAL
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#endif
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#define CONFIG_SMC911X
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/* dummy: referenced by examples/standalone/smc911x_eeprom.c */
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#define CONFIG_SMC911X_BASE 0
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#define CONFIG_SMC911X_32_BIT
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/*-----------------------------------------------------------------------
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* MMU and Cache Setting
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*----------------------------------------------------------------------*/
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/* Comment out the following to enable L1 cache */
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/* #define CONFIG_SYS_ICACHE_OFF */
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/* #define CONFIG_SYS_DCACHE_OFF */
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#define CONFIG_SYS_CACHELINE_SIZE 32
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/* Comment out the following to enable L2 cache */
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#define CONFIG_UNIPHIER_L2CACHE_ON
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_MISC_INIT_F
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_EARLY_INIT_R
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#define CONFIG_TIMESTAMP
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/* FLASH related */
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#define CONFIG_MTD_DEVICE
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/*
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* uncomment the following to disable FLASH related code.
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*/
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/* #define CONFIG_SYS_NO_FLASH */
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_MONITOR_BASE 0
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#define CONFIG_SYS_FLASH_BASE 0
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/*
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* flash_toggle does not work for out supoort card.
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* We need to use flash_status_poll.
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*/
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#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
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#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
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#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
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/* serial console configuration */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_GENERIC_BOARD
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#if !defined(CONFIG_SPL_BUILD)
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#define CONFIG_USE_ARCH_MEMSET
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#define CONFIG_USE_ARCH_MEMCPY
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#endif
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_CMDLINE_EDITING /* add command line history */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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#define CONFIG_CONS_INDEX 1
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/*
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* For NAND booting the environment is embedded in the U-Boot image. Please take
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* look at the file board/amcc/canyonlands/u-boot-nand.lds for details.
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*/
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/* #define CONFIG_ENV_IS_IN_NAND */
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_ENV_OFFSET 0x0
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/* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
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/* Time clock 1MHz */
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#define CONFIG_SYS_TIMER_RATE 1000000
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/*
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* By default, ARP timeout is 5 sec.
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* The first ARP request does not seem to work.
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* So we need to retry ARP request anyway.
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* We want to shrink the interval until the second ARP request.
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*/
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#define CONFIG_ARP_TIMEOUT 500UL /* 0.5 msec */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 2
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_NAND_DENALI_ECC_SIZE 1024
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#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3
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#define CONFIG_SYS_NAND_REGS_BASE 0xf8100000
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#define CONFIG_SYS_NAND_DATA_BASE 0xf8000000
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#else
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#define CONFIG_SYS_NAND_REGS_BASE 0x68100000
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#define CONFIG_SYS_NAND_DATA_BASE 0x68000000
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#endif
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#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10)
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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/* USB */
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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#define CONFIG_DOS_PARTITION
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
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/*
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* Network Configuration
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*/
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#define CONFIG_SERVERIP 192.168.11.1
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#define CONFIG_IPADDR 192.168.11.10
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#define CONFIG_GATEWAYIP 192.168.11.1
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_LOADADDR 0x84000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_EDITING /* add command line history */
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#define CONFIG_BOOTCOMMAND "run $bootmode"
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#define CONFIG_ROOTPATH "/nfs/root/path"
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#define CONFIG_NFSBOOTCOMMAND \
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"setenv bootargs $bootargs root=/dev/nfs rw " \
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"nfsroot=$serverip:$rootpath " \
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"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
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"tftpboot; bootm;"
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#ifdef CONFIG_FIT
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#define CONFIG_BOOTFILE "fitImage"
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#define LINUXBOOT_ENV_SETTINGS \
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"fit_addr=0x00100000\0" \
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"fit_addr_r=0x84100000\0" \
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"fit_size=0x00f00000\0" \
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"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
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"bootm $fit_addr\0" \
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"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
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"bootm $fit_addr_r\0" \
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"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
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"bootm $fit_addr_r\0"
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#else
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#define CONFIG_BOOTFILE "uImage"
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#define LINUXBOOT_ENV_SETTINGS \
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"fdt_addr=0x00100000\0" \
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"fdt_addr_r=0x84100000\0" \
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"fdt_size=0x00008000\0" \
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"fdt_file=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
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"kernel_addr=0x00200000\0" \
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"kernel_addr_r=0x84200000\0" \
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"kernel_size=0x00800000\0" \
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"ramdisk_addr=0x00a00000\0" \
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"ramdisk_addr_r=0x84a00000\0" \
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"ramdisk_size=0x00600000\0" \
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"ramdisk_file=rootfs.cpio.uboot\0" \
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"norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
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"setexpr ramdisk_addr $nor_base + $ramdisk_addr &&" \
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"setexpr fdt_addr $nor_base + $fdt_addr &&" \
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"bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \
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"nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
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"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
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"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
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"bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
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"tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
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"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
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"tftpboot $fdt_addr_r $fdt_file &&" \
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"bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0"
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"verify=n\0" \
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"norbase=0x42000000\0" \
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"nandupdate=nand erase 0 0x00100000 &&" \
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"tftpboot u-boot-spl-dtb.bin &&" \
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"nand write $loadaddr 0 0x00010000 &&" \
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"tftpboot u-boot-dtb.img &&" \
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"nand write $loadaddr 0x00010000 0x000f0000\0" \
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LINUXBOOT_ENV_SETTINGS
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/* Open Firmware flat tree */
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#define CONFIG_OF_LIBFDT
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_NR_DRAM_BANKS 2
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
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defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
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#define CONFIG_SPL_TEXT_BASE 0x00040000
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#else
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#define CONFIG_SPL_TEXT_BASE 0x00100000
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#endif
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#define CONFIG_SPL_STACK (0x0ff08000)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
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#define CONFIG_PANIC_HANG
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000
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#define CONFIG_SPL_MAX_FOOTPRINT 0x10000
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#endif /* __CONFIG_UNIPHIER_COMMON_H__ */
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