mirror of
https://github.com/AsahiLinux/u-boot
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ebc1d50ab5
The fdt_path_offset() function is slow since it must scan the tree.
This substantial overhead now applies to all boards.
The original code may not be ideal but it is fit for purpose and is only
needed on a few boards.
Reverting this reduces time to set up driver model by about 30ms.
Before revert:
Accumulated time:
47,170 dm_r
53,237 dm_spl
572,986 dm_f
Accumulated time:
44,598 dm_r
50,347 dm_spl
549,133 dm_f
This reverts commit 26f981f295
.
Signed-off-by: Simon Glass <sjg@chromium.org>
1847 lines
44 KiB
C
1847 lines
44 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2011 The Chromium OS Authors.
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*/
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#ifndef USE_HOSTCC
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#include <common.h>
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#include <boot_fit.h>
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#include <display_options.h>
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#include <dm.h>
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#include <hang.h>
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#include <init.h>
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#include <log.h>
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#include <malloc.h>
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#include <net.h>
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#include <spl.h>
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#include <env.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <fdt_support.h>
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#include <gzip.h>
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#include <mapmem.h>
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#include <linux/libfdt.h>
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#include <serial.h>
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#include <asm/global_data.h>
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#include <asm/sections.h>
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#include <dm/ofnode.h>
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#include <dm/of_extra.h>
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#include <linux/ctype.h>
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#include <linux/lzo.h>
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#include <linux/ioport.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Here are the type we know about. One day we might allow drivers to
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* register. For now we just put them here. The COMPAT macro allows us to
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* turn this into a sparse list later, and keeps the ID with the name.
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*
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* NOTE: This list is basically a TODO list for things that need to be
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* converted to driver model. So don't add new things here unless there is a
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* good reason why driver-model conversion is infeasible. Examples include
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* things which are used before driver model is available.
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*/
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#define COMPAT(id, name) name
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static const char * const compat_names[COMPAT_COUNT] = {
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COMPAT(UNKNOWN, "<none>"),
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COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
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COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
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COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
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COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
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COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
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COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
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COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
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COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
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COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
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COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
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COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
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COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
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COMPAT(INTEL_MICROCODE, "intel,microcode"),
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COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
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COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
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COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
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COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
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COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
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COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
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COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
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COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
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COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
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COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
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COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
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COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
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COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
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COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
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COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
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COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
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COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
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COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
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COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
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};
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static const char *const fdt_src_name[] = {
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[FDTSRC_SEPARATE] = "separate",
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[FDTSRC_FIT] = "fit",
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[FDTSRC_BOARD] = "board",
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[FDTSRC_EMBED] = "embed",
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[FDTSRC_ENV] = "env",
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};
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const char *fdtdec_get_srcname(void)
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{
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return fdt_src_name[gd->fdt_src];
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}
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const char *fdtdec_get_compatible(enum fdt_compat_id id)
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{
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/* We allow reading of the 'unknown' ID for testing purposes */
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assert(id >= 0 && id < COMPAT_COUNT);
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return compat_names[id];
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}
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fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
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const char *prop_name, int index, int na,
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int ns, fdt_size_t *sizep,
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bool translate)
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{
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const fdt32_t *prop, *prop_end;
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const fdt32_t *prop_addr, *prop_size, *prop_after_size;
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int len;
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fdt_addr_t addr;
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debug("%s: %s: ", __func__, prop_name);
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prop = fdt_getprop(blob, node, prop_name, &len);
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if (!prop) {
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debug("(not found)\n");
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return FDT_ADDR_T_NONE;
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}
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prop_end = prop + (len / sizeof(*prop));
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prop_addr = prop + (index * (na + ns));
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prop_size = prop_addr + na;
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prop_after_size = prop_size + ns;
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if (prop_after_size > prop_end) {
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debug("(not enough data: expected >= %d cells, got %d cells)\n",
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(u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
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return FDT_ADDR_T_NONE;
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}
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#if CONFIG_IS_ENABLED(OF_TRANSLATE)
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if (translate)
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addr = fdt_translate_address(blob, node, prop_addr);
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else
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#endif
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addr = fdtdec_get_number(prop_addr, na);
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if (sizep) {
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*sizep = fdtdec_get_number(prop_size, ns);
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debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
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(unsigned long long)*sizep);
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} else {
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debug("addr=%08llx\n", (unsigned long long)addr);
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}
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return addr;
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}
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fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
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int node, const char *prop_name,
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int index, fdt_size_t *sizep,
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bool translate)
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{
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int na, ns;
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debug("%s: ", __func__);
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na = fdt_address_cells(blob, parent);
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if (na < 1) {
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debug("(bad #address-cells)\n");
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return FDT_ADDR_T_NONE;
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}
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ns = fdt_size_cells(blob, parent);
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if (ns < 0) {
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debug("(bad #size-cells)\n");
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return FDT_ADDR_T_NONE;
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}
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debug("na=%d, ns=%d, ", na, ns);
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return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
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ns, sizep, translate);
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}
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fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
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const char *prop_name, int index,
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fdt_size_t *sizep,
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bool translate)
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{
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int parent;
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debug("%s: ", __func__);
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parent = fdt_parent_offset(blob, node);
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if (parent < 0) {
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debug("(no parent found)\n");
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return FDT_ADDR_T_NONE;
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}
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return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
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index, sizep, translate);
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}
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fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
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const char *prop_name, fdt_size_t *sizep)
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{
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int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
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return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
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sizeof(fdt_addr_t) / sizeof(fdt32_t),
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ns, sizep, false);
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}
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fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
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{
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return fdtdec_get_addr_size(blob, node, prop_name, NULL);
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}
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int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
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{
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const char *list, *end;
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int len;
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list = fdt_getprop(blob, node, "compatible", &len);
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if (!list)
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return -ENOENT;
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end = list + len;
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while (list < end) {
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len = strlen(list);
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if (len >= strlen("pciVVVV,DDDD")) {
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char *s = strstr(list, "pci");
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/*
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* check if the string is something like pciVVVV,DDDD.RR
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* or just pciVVVV,DDDD
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*/
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if (s && s[7] == ',' &&
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(s[12] == '.' || s[12] == 0)) {
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s += 3;
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*vendor = simple_strtol(s, NULL, 16);
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s += 5;
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*device = simple_strtol(s, NULL, 16);
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return 0;
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}
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}
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list += (len + 1);
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}
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return -ENOENT;
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}
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int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
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u32 *bar)
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{
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int barnum;
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/* extract the bar number from fdt_pci_addr */
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barnum = addr->phys_hi & 0xff;
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if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
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return -EINVAL;
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barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
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*bar = dm_pci_read_bar32(dev, barnum);
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return 0;
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}
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int fdtdec_get_pci_bus_range(const void *blob, int node,
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struct fdt_resource *res)
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{
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const u32 *values;
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int len;
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values = fdt_getprop(blob, node, "bus-range", &len);
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if (!values || len < sizeof(*values) * 2)
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return -EINVAL;
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res->start = fdt32_to_cpu(*values++);
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res->end = fdt32_to_cpu(*values);
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return 0;
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}
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uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
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uint64_t default_val)
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{
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const unaligned_fdt64_t *cell64;
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int length;
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cell64 = fdt_getprop(blob, node, prop_name, &length);
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if (!cell64 || length < sizeof(*cell64))
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return default_val;
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return fdt64_to_cpu(*cell64);
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}
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int fdtdec_get_is_enabled(const void *blob, int node)
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{
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const char *cell;
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/*
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* It should say "okay", so only allow that. Some fdts use "ok" but
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* this is a bug. Please fix your device tree source file. See here
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* for discussion:
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*
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* http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
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*/
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cell = fdt_getprop(blob, node, "status", NULL);
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if (cell)
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return strcmp(cell, "okay") == 0;
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return 1;
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}
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enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
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{
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enum fdt_compat_id id;
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/* Search our drivers */
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for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
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if (fdt_node_check_compatible(blob, node,
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compat_names[id]) == 0)
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return id;
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return COMPAT_UNKNOWN;
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}
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int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
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{
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return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
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}
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int fdtdec_next_compatible_subnode(const void *blob, int node,
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enum fdt_compat_id id, int *depthp)
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{
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do {
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node = fdt_next_node(blob, node, depthp);
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} while (*depthp > 1);
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/* If this is a direct subnode, and compatible, return it */
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if (*depthp == 1 && 0 == fdt_node_check_compatible(
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blob, node, compat_names[id]))
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return node;
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return -FDT_ERR_NOTFOUND;
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}
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int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
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int *upto)
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{
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#define MAX_STR_LEN 20
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char str[MAX_STR_LEN + 20];
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int node, err;
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/* snprintf() is not available */
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assert(strlen(name) < MAX_STR_LEN);
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sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
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node = fdt_path_offset(blob, str);
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if (node < 0)
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return node;
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err = fdt_node_check_compatible(blob, node, compat_names[id]);
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if (err < 0)
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return err;
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if (err)
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return -FDT_ERR_NOTFOUND;
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(*upto)++;
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return node;
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}
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int fdtdec_find_aliases_for_id(const void *blob, const char *name,
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enum fdt_compat_id id, int *node_list,
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int maxcount)
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{
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memset(node_list, '\0', sizeof(*node_list) * maxcount);
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return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
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}
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/* TODO: Can we tighten this code up a little? */
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int fdtdec_add_aliases_for_id(const void *blob, const char *name,
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enum fdt_compat_id id, int *node_list,
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int maxcount)
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{
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int name_len = strlen(name);
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int nodes[maxcount];
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int num_found = 0;
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int offset, node;
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int alias_node;
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int count;
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int i, j;
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/* find the alias node if present */
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alias_node = fdt_path_offset(blob, "/aliases");
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/*
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* start with nothing, and we can assume that the root node can't
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* match
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*/
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memset(nodes, '\0', sizeof(nodes));
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/* First find all the compatible nodes */
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for (node = count = 0; node >= 0 && count < maxcount;) {
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node = fdtdec_next_compatible(blob, node, id);
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if (node >= 0)
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nodes[count++] = node;
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}
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if (node >= 0)
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debug("%s: warning: maxcount exceeded with alias '%s'\n",
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__func__, name);
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/* Now find all the aliases */
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for (offset = fdt_first_property_offset(blob, alias_node);
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offset > 0;
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offset = fdt_next_property_offset(blob, offset)) {
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const struct fdt_property *prop;
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const char *path;
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int number;
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int found;
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node = 0;
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prop = fdt_get_property_by_offset(blob, offset, NULL);
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path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
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if (prop->len && 0 == strncmp(path, name, name_len))
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node = fdt_path_offset(blob, prop->data);
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if (node <= 0)
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continue;
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/* Get the alias number */
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number = dectoul(path + name_len, NULL);
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if (number < 0 || number >= maxcount) {
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debug("%s: warning: alias '%s' is out of range\n",
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__func__, path);
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continue;
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}
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/* Make sure the node we found is actually in our list! */
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found = -1;
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for (j = 0; j < count; j++)
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if (nodes[j] == node) {
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found = j;
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break;
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}
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if (found == -1) {
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debug("%s: warning: alias '%s' points to a node "
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"'%s' that is missing or is not compatible "
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" with '%s'\n", __func__, path,
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fdt_get_name(blob, node, NULL),
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compat_names[id]);
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continue;
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}
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/*
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* Add this node to our list in the right place, and mark
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* it as done.
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*/
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if (fdtdec_get_is_enabled(blob, node)) {
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if (node_list[number]) {
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debug("%s: warning: alias '%s' requires that "
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"a node be placed in the list in a "
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"position which is already filled by "
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"node '%s'\n", __func__, path,
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fdt_get_name(blob, node, NULL));
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continue;
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}
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node_list[number] = node;
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if (number >= num_found)
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num_found = number + 1;
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}
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nodes[found] = 0;
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}
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|
|
|
/* Add any nodes not mentioned by an alias */
|
|
for (i = j = 0; i < maxcount; i++) {
|
|
if (!node_list[i]) {
|
|
for (; j < maxcount; j++)
|
|
if (nodes[j] &&
|
|
fdtdec_get_is_enabled(blob, nodes[j]))
|
|
break;
|
|
|
|
/* Have we run out of nodes to add? */
|
|
if (j == maxcount)
|
|
break;
|
|
|
|
assert(!node_list[i]);
|
|
node_list[i] = nodes[j++];
|
|
if (i >= num_found)
|
|
num_found = i + 1;
|
|
}
|
|
}
|
|
|
|
return num_found;
|
|
}
|
|
|
|
int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
|
|
int *seqp)
|
|
{
|
|
int base_len = strlen(base);
|
|
const char *find_name;
|
|
int find_namelen;
|
|
int prop_offset;
|
|
int aliases;
|
|
|
|
find_name = fdt_get_name(blob, offset, &find_namelen);
|
|
debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
|
|
|
|
aliases = fdt_path_offset(blob, "/aliases");
|
|
for (prop_offset = fdt_first_property_offset(blob, aliases);
|
|
prop_offset > 0;
|
|
prop_offset = fdt_next_property_offset(blob, prop_offset)) {
|
|
const char *prop;
|
|
const char *name;
|
|
const char *slash;
|
|
int len, val;
|
|
|
|
prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
|
|
debug(" - %s, %s\n", name, prop);
|
|
if (len < find_namelen || *prop != '/' || prop[len - 1] ||
|
|
strncmp(name, base, base_len))
|
|
continue;
|
|
|
|
slash = strrchr(prop, '/');
|
|
if (strcmp(slash + 1, find_name))
|
|
continue;
|
|
|
|
/*
|
|
* Adding an extra check to distinguish DT nodes with
|
|
* same name
|
|
*/
|
|
if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
|
|
if (fdt_get_phandle(blob, offset) !=
|
|
fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
|
|
continue;
|
|
}
|
|
|
|
val = trailing_strtol(name);
|
|
if (val != -1) {
|
|
*seqp = val;
|
|
debug("Found seq %d\n", *seqp);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
debug("Not found\n");
|
|
return -ENOENT;
|
|
}
|
|
|
|
int fdtdec_get_alias_highest_id(const void *blob, const char *base)
|
|
{
|
|
int base_len = strlen(base);
|
|
int prop_offset;
|
|
int aliases;
|
|
int max = -1;
|
|
|
|
debug("Looking for highest alias id for '%s'\n", base);
|
|
|
|
aliases = fdt_path_offset(blob, "/aliases");
|
|
for (prop_offset = fdt_first_property_offset(blob, aliases);
|
|
prop_offset > 0;
|
|
prop_offset = fdt_next_property_offset(blob, prop_offset)) {
|
|
const char *prop;
|
|
const char *name;
|
|
int len, val;
|
|
|
|
prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
|
|
debug(" - %s, %s\n", name, prop);
|
|
if (*prop != '/' || prop[len - 1] ||
|
|
strncmp(name, base, base_len))
|
|
continue;
|
|
|
|
val = trailing_strtol(name);
|
|
if (val > max) {
|
|
debug("Found seq %d\n", val);
|
|
max = val;
|
|
}
|
|
}
|
|
|
|
return max;
|
|
}
|
|
|
|
const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
|
|
{
|
|
int chosen_node;
|
|
|
|
if (!blob)
|
|
return NULL;
|
|
chosen_node = fdt_path_offset(blob, "/chosen");
|
|
return fdt_getprop(blob, chosen_node, name, NULL);
|
|
}
|
|
|
|
int fdtdec_get_chosen_node(const void *blob, const char *name)
|
|
{
|
|
const char *prop;
|
|
|
|
prop = fdtdec_get_chosen_prop(blob, name);
|
|
if (!prop)
|
|
return -FDT_ERR_NOTFOUND;
|
|
return fdt_path_offset(blob, prop);
|
|
}
|
|
|
|
/**
|
|
* fdtdec_prepare_fdt() - Check we have a valid fdt available to control U-Boot
|
|
*
|
|
* @blob: Blob to check
|
|
*
|
|
* If not, a message is printed to the console if the console is ready.
|
|
*
|
|
* Return: 0 if all ok, -ENOENT if not
|
|
*/
|
|
static int fdtdec_prepare_fdt(const void *blob)
|
|
{
|
|
if (!blob || ((uintptr_t)blob & 3) || fdt_check_header(blob)) {
|
|
if (spl_phase() <= PHASE_SPL) {
|
|
puts("Missing DTB\n");
|
|
} else {
|
|
printf("No valid device tree binary found at %p\n",
|
|
blob);
|
|
if (_DEBUG && blob) {
|
|
printf("fdt_blob=%p\n", blob);
|
|
print_buffer((ulong)blob, blob, 4, 32, 0);
|
|
}
|
|
}
|
|
return -ENOENT;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int fdtdec_check_fdt(void)
|
|
{
|
|
/*
|
|
* We must have an FDT, but we cannot panic() yet since the console
|
|
* is not ready. So for now, just assert(). Boards which need an early
|
|
* FDT (prior to console ready) will need to make their own
|
|
* arrangements and do their own checks.
|
|
*/
|
|
assert(!fdtdec_prepare_fdt(gd->fdt_blob));
|
|
return 0;
|
|
}
|
|
|
|
int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
|
|
{
|
|
const u32 *phandle;
|
|
int lookup;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
phandle = fdt_getprop(blob, node, prop_name, NULL);
|
|
if (!phandle)
|
|
return -FDT_ERR_NOTFOUND;
|
|
|
|
lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
|
|
return lookup;
|
|
}
|
|
|
|
/**
|
|
* Look up a property in a node and check that it has a minimum length.
|
|
*
|
|
* @param blob FDT blob
|
|
* @param node node to examine
|
|
* @param prop_name name of property to find
|
|
* @param min_len minimum property length in bytes
|
|
* @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
|
|
found, or -FDT_ERR_BADLAYOUT if not enough data
|
|
* Return: pointer to cell, which is only valid if err == 0
|
|
*/
|
|
static const void *get_prop_check_min_len(const void *blob, int node,
|
|
const char *prop_name, int min_len,
|
|
int *err)
|
|
{
|
|
const void *cell;
|
|
int len;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = fdt_getprop(blob, node, prop_name, &len);
|
|
if (!cell)
|
|
*err = -FDT_ERR_NOTFOUND;
|
|
else if (len < min_len)
|
|
*err = -FDT_ERR_BADLAYOUT;
|
|
else
|
|
*err = 0;
|
|
return cell;
|
|
}
|
|
|
|
int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
|
|
u32 *array, int count)
|
|
{
|
|
const u32 *cell;
|
|
int err = 0;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = get_prop_check_min_len(blob, node, prop_name,
|
|
sizeof(u32) * count, &err);
|
|
if (!err) {
|
|
int i;
|
|
|
|
for (i = 0; i < count; i++)
|
|
array[i] = fdt32_to_cpu(cell[i]);
|
|
}
|
|
return err;
|
|
}
|
|
|
|
int fdtdec_get_int_array_count(const void *blob, int node,
|
|
const char *prop_name, u32 *array, int count)
|
|
{
|
|
const u32 *cell;
|
|
int len, elems;
|
|
int i;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = fdt_getprop(blob, node, prop_name, &len);
|
|
if (!cell)
|
|
return -FDT_ERR_NOTFOUND;
|
|
elems = len / sizeof(u32);
|
|
if (count > elems)
|
|
count = elems;
|
|
for (i = 0; i < count; i++)
|
|
array[i] = fdt32_to_cpu(cell[i]);
|
|
|
|
return count;
|
|
}
|
|
|
|
const u32 *fdtdec_locate_array(const void *blob, int node,
|
|
const char *prop_name, int count)
|
|
{
|
|
const u32 *cell;
|
|
int err;
|
|
|
|
cell = get_prop_check_min_len(blob, node, prop_name,
|
|
sizeof(u32) * count, &err);
|
|
return err ? NULL : cell;
|
|
}
|
|
|
|
int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
|
|
{
|
|
const s32 *cell;
|
|
int len;
|
|
|
|
debug("%s: %s\n", __func__, prop_name);
|
|
cell = fdt_getprop(blob, node, prop_name, &len);
|
|
return cell != NULL;
|
|
}
|
|
|
|
int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
|
|
const char *list_name,
|
|
const char *cells_name,
|
|
int cell_count, int index,
|
|
struct fdtdec_phandle_args *out_args)
|
|
{
|
|
const __be32 *list, *list_end;
|
|
int rc = 0, size, cur_index = 0;
|
|
uint32_t count = 0;
|
|
int node = -1;
|
|
int phandle;
|
|
|
|
/* Retrieve the phandle list property */
|
|
list = fdt_getprop(blob, src_node, list_name, &size);
|
|
if (!list)
|
|
return -ENOENT;
|
|
list_end = list + size / sizeof(*list);
|
|
|
|
/* Loop over the phandles until all the requested entry is found */
|
|
while (list < list_end) {
|
|
rc = -EINVAL;
|
|
count = 0;
|
|
|
|
/*
|
|
* If phandle is 0, then it is an empty entry with no
|
|
* arguments. Skip forward to the next entry.
|
|
*/
|
|
phandle = be32_to_cpup(list++);
|
|
if (phandle) {
|
|
/*
|
|
* Find the provider node and parse the #*-cells
|
|
* property to determine the argument length.
|
|
*
|
|
* This is not needed if the cell count is hard-coded
|
|
* (i.e. cells_name not set, but cell_count is set),
|
|
* except when we're going to return the found node
|
|
* below.
|
|
*/
|
|
if (cells_name || cur_index == index) {
|
|
node = fdt_node_offset_by_phandle(blob,
|
|
phandle);
|
|
if (node < 0) {
|
|
debug("%s: could not find phandle\n",
|
|
fdt_get_name(blob, src_node,
|
|
NULL));
|
|
goto err;
|
|
}
|
|
}
|
|
|
|
if (cells_name) {
|
|
count = fdtdec_get_int(blob, node, cells_name,
|
|
-1);
|
|
if (count == -1) {
|
|
debug("%s: could not get %s for %s\n",
|
|
fdt_get_name(blob, src_node,
|
|
NULL),
|
|
cells_name,
|
|
fdt_get_name(blob, node,
|
|
NULL));
|
|
goto err;
|
|
}
|
|
} else {
|
|
count = cell_count;
|
|
}
|
|
|
|
/*
|
|
* Make sure that the arguments actually fit in the
|
|
* remaining property data length
|
|
*/
|
|
if (list + count > list_end) {
|
|
debug("%s: arguments longer than property\n",
|
|
fdt_get_name(blob, src_node, NULL));
|
|
goto err;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* All of the error cases above bail out of the loop, so at
|
|
* this point, the parsing is successful. If the requested
|
|
* index matches, then fill the out_args structure and return,
|
|
* or return -ENOENT for an empty entry.
|
|
*/
|
|
rc = -ENOENT;
|
|
if (cur_index == index) {
|
|
if (!phandle)
|
|
goto err;
|
|
|
|
if (out_args) {
|
|
int i;
|
|
|
|
if (count > MAX_PHANDLE_ARGS) {
|
|
debug("%s: too many arguments %d\n",
|
|
fdt_get_name(blob, src_node,
|
|
NULL), count);
|
|
count = MAX_PHANDLE_ARGS;
|
|
}
|
|
out_args->node = node;
|
|
out_args->args_count = count;
|
|
for (i = 0; i < count; i++) {
|
|
out_args->args[i] =
|
|
be32_to_cpup(list++);
|
|
}
|
|
}
|
|
|
|
/* Found it! return success */
|
|
return 0;
|
|
}
|
|
|
|
node = -1;
|
|
list += count;
|
|
cur_index++;
|
|
}
|
|
|
|
/*
|
|
* Result will be one of:
|
|
* -ENOENT : index is for empty phandle
|
|
* -EINVAL : parsing error on data
|
|
* [1..n] : Number of phandle (count mode; when index = -1)
|
|
*/
|
|
rc = index < 0 ? cur_index : -ENOENT;
|
|
err:
|
|
return rc;
|
|
}
|
|
|
|
int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
|
|
u8 *array, int count)
|
|
{
|
|
const u8 *cell;
|
|
int err;
|
|
|
|
cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
|
|
if (!err)
|
|
memcpy(array, cell, count);
|
|
return err;
|
|
}
|
|
|
|
const u8 *fdtdec_locate_byte_array(const void *blob, int node,
|
|
const char *prop_name, int count)
|
|
{
|
|
const u8 *cell;
|
|
int err;
|
|
|
|
cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
|
|
if (err)
|
|
return NULL;
|
|
return cell;
|
|
}
|
|
|
|
u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
|
|
{
|
|
u64 number = 0;
|
|
|
|
while (cells--)
|
|
number = (number << 32) | fdt32_to_cpu(*ptr++);
|
|
|
|
return number;
|
|
}
|
|
|
|
int fdt_get_resource(const void *fdt, int node, const char *property,
|
|
unsigned int index, struct fdt_resource *res)
|
|
{
|
|
const fdt32_t *ptr, *end;
|
|
int na, ns, len, parent;
|
|
unsigned int i = 0;
|
|
|
|
parent = fdt_parent_offset(fdt, node);
|
|
if (parent < 0)
|
|
return parent;
|
|
|
|
na = fdt_address_cells(fdt, parent);
|
|
ns = fdt_size_cells(fdt, parent);
|
|
|
|
ptr = fdt_getprop(fdt, node, property, &len);
|
|
if (!ptr)
|
|
return len;
|
|
|
|
end = ptr + len / sizeof(*ptr);
|
|
|
|
while (ptr + na + ns <= end) {
|
|
if (i == index) {
|
|
if (CONFIG_IS_ENABLED(OF_TRANSLATE))
|
|
res->start = fdt_translate_address(fdt, node, ptr);
|
|
else
|
|
res->start = fdtdec_get_number(ptr, na);
|
|
|
|
res->end = res->start;
|
|
res->end += fdtdec_get_number(&ptr[na], ns) - 1;
|
|
return 0;
|
|
}
|
|
|
|
ptr += na + ns;
|
|
i++;
|
|
}
|
|
|
|
return -FDT_ERR_NOTFOUND;
|
|
}
|
|
|
|
int fdt_get_named_resource(const void *fdt, int node, const char *property,
|
|
const char *prop_names, const char *name,
|
|
struct fdt_resource *res)
|
|
{
|
|
int index;
|
|
|
|
index = fdt_stringlist_search(fdt, node, prop_names, name);
|
|
if (index < 0)
|
|
return index;
|
|
|
|
return fdt_get_resource(fdt, node, property, index, res);
|
|
}
|
|
|
|
static int decode_timing_property(const void *blob, int node, const char *name,
|
|
struct timing_entry *result)
|
|
{
|
|
int length, ret = 0;
|
|
const u32 *prop;
|
|
|
|
prop = fdt_getprop(blob, node, name, &length);
|
|
if (!prop) {
|
|
debug("%s: could not find property %s\n",
|
|
fdt_get_name(blob, node, NULL), name);
|
|
return length;
|
|
}
|
|
|
|
if (length == sizeof(u32)) {
|
|
result->typ = fdtdec_get_int(blob, node, name, 0);
|
|
result->min = result->typ;
|
|
result->max = result->typ;
|
|
} else {
|
|
ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
int fdtdec_decode_display_timing(const void *blob, int parent, int index,
|
|
struct display_timing *dt)
|
|
{
|
|
int i, node, timings_node;
|
|
u32 val = 0;
|
|
int ret = 0;
|
|
|
|
timings_node = fdt_subnode_offset(blob, parent, "display-timings");
|
|
if (timings_node < 0)
|
|
return timings_node;
|
|
|
|
for (i = 0, node = fdt_first_subnode(blob, timings_node);
|
|
node > 0 && i != index;
|
|
node = fdt_next_subnode(blob, node))
|
|
i++;
|
|
|
|
if (node < 0)
|
|
return node;
|
|
|
|
memset(dt, 0, sizeof(*dt));
|
|
|
|
ret |= decode_timing_property(blob, node, "hback-porch",
|
|
&dt->hback_porch);
|
|
ret |= decode_timing_property(blob, node, "hfront-porch",
|
|
&dt->hfront_porch);
|
|
ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
|
|
ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
|
|
ret |= decode_timing_property(blob, node, "vback-porch",
|
|
&dt->vback_porch);
|
|
ret |= decode_timing_property(blob, node, "vfront-porch",
|
|
&dt->vfront_porch);
|
|
ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
|
|
ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
|
|
ret |= decode_timing_property(blob, node, "clock-frequency",
|
|
&dt->pixelclock);
|
|
|
|
dt->flags = 0;
|
|
val = fdtdec_get_int(blob, node, "vsync-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
|
|
DISPLAY_FLAGS_VSYNC_LOW;
|
|
}
|
|
val = fdtdec_get_int(blob, node, "hsync-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
|
|
DISPLAY_FLAGS_HSYNC_LOW;
|
|
}
|
|
val = fdtdec_get_int(blob, node, "de-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
|
|
DISPLAY_FLAGS_DE_LOW;
|
|
}
|
|
val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
|
|
if (val != -1) {
|
|
dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
|
|
DISPLAY_FLAGS_PIXDATA_NEGEDGE;
|
|
}
|
|
|
|
if (fdtdec_get_bool(blob, node, "interlaced"))
|
|
dt->flags |= DISPLAY_FLAGS_INTERLACED;
|
|
if (fdtdec_get_bool(blob, node, "doublescan"))
|
|
dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
|
|
if (fdtdec_get_bool(blob, node, "doubleclk"))
|
|
dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
|
|
|
|
return ret;
|
|
}
|
|
|
|
int fdtdec_setup_mem_size_base(void)
|
|
{
|
|
int ret;
|
|
ofnode mem;
|
|
struct resource res;
|
|
|
|
mem = ofnode_path("/memory");
|
|
if (!ofnode_valid(mem)) {
|
|
debug("%s: Missing /memory node\n", __func__);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = ofnode_read_resource(mem, 0, &res);
|
|
if (ret != 0) {
|
|
debug("%s: Unable to decode first memory bank\n", __func__);
|
|
return -EINVAL;
|
|
}
|
|
|
|
gd->ram_size = (phys_size_t)(res.end - res.start + 1);
|
|
gd->ram_base = (unsigned long)res.start;
|
|
debug("%s: Initial DRAM size %llx\n", __func__,
|
|
(unsigned long long)gd->ram_size);
|
|
|
|
return 0;
|
|
}
|
|
|
|
ofnode get_next_memory_node(ofnode mem)
|
|
{
|
|
do {
|
|
mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
|
|
} while (!ofnode_is_enabled(mem));
|
|
|
|
return mem;
|
|
}
|
|
|
|
int fdtdec_setup_memory_banksize(void)
|
|
{
|
|
int bank, ret, reg = 0;
|
|
struct resource res;
|
|
ofnode mem = ofnode_null();
|
|
|
|
mem = get_next_memory_node(mem);
|
|
if (!ofnode_valid(mem)) {
|
|
debug("%s: Missing /memory node\n", __func__);
|
|
return -EINVAL;
|
|
}
|
|
|
|
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
|
|
ret = ofnode_read_resource(mem, reg++, &res);
|
|
if (ret < 0) {
|
|
reg = 0;
|
|
mem = get_next_memory_node(mem);
|
|
if (!ofnode_valid(mem))
|
|
break;
|
|
|
|
ret = ofnode_read_resource(mem, reg++, &res);
|
|
if (ret < 0)
|
|
break;
|
|
}
|
|
|
|
if (ret != 0)
|
|
return -EINVAL;
|
|
|
|
gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
|
|
gd->bd->bi_dram[bank].size =
|
|
(phys_size_t)(res.end - res.start + 1);
|
|
|
|
debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
|
|
__func__, bank,
|
|
(unsigned long long)gd->bd->bi_dram[bank].start,
|
|
(unsigned long long)gd->bd->bi_dram[bank].size);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int fdtdec_setup_mem_size_base_lowest(void)
|
|
{
|
|
int bank, ret, reg = 0;
|
|
struct resource res;
|
|
unsigned long base;
|
|
phys_size_t size;
|
|
ofnode mem = ofnode_null();
|
|
|
|
gd->ram_base = (unsigned long)~0;
|
|
|
|
mem = get_next_memory_node(mem);
|
|
if (!ofnode_valid(mem)) {
|
|
debug("%s: Missing /memory node\n", __func__);
|
|
return -EINVAL;
|
|
}
|
|
|
|
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
|
|
ret = ofnode_read_resource(mem, reg++, &res);
|
|
if (ret < 0) {
|
|
reg = 0;
|
|
mem = get_next_memory_node(mem);
|
|
if (!ofnode_valid(mem))
|
|
break;
|
|
|
|
ret = ofnode_read_resource(mem, reg++, &res);
|
|
if (ret < 0)
|
|
break;
|
|
}
|
|
|
|
if (ret != 0)
|
|
return -EINVAL;
|
|
|
|
base = (unsigned long)res.start;
|
|
size = (phys_size_t)(res.end - res.start + 1);
|
|
|
|
if (gd->ram_base > base && size) {
|
|
gd->ram_base = base;
|
|
gd->ram_size = size;
|
|
debug("%s: Initial DRAM base %lx size %lx\n",
|
|
__func__, base, (unsigned long)size);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
|
|
{
|
|
#if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
|
|
CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
|
|
size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
|
|
bool gzip = 0, lzo = 0;
|
|
ulong sz_in = sz_src;
|
|
void *dst;
|
|
int rc;
|
|
|
|
if (CONFIG_IS_ENABLED(GZIP))
|
|
if (gzip_parse_header(src, sz_in) >= 0)
|
|
gzip = 1;
|
|
if (CONFIG_IS_ENABLED(LZO))
|
|
if (!gzip && lzop_is_valid_header(src))
|
|
lzo = 1;
|
|
|
|
if (!gzip && !lzo)
|
|
return -EBADMSG;
|
|
|
|
|
|
if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
|
|
dst = malloc(sz_out);
|
|
if (!dst) {
|
|
puts("uncompress_blob: Unable to allocate memory\n");
|
|
return -ENOMEM;
|
|
}
|
|
} else {
|
|
# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
|
|
dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
|
|
# else
|
|
return -ENOTSUPP;
|
|
# endif
|
|
}
|
|
|
|
if (CONFIG_IS_ENABLED(GZIP) && gzip)
|
|
rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
|
|
else if (CONFIG_IS_ENABLED(LZO) && lzo)
|
|
rc = lzop_decompress(src, sz_in, dst, &sz_out);
|
|
else
|
|
hang();
|
|
|
|
if (rc < 0) {
|
|
/* not a valid compressed blob */
|
|
puts("uncompress_blob: Unable to uncompress\n");
|
|
if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
|
|
free(dst);
|
|
return -EBADMSG;
|
|
}
|
|
*dstp = dst;
|
|
#else
|
|
*dstp = (void *)src;
|
|
*dstp = (void *)src;
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* fdt_find_separate() - Find a devicetree at the end of the image
|
|
*
|
|
* Return: pointer to FDT blob
|
|
*/
|
|
static void *fdt_find_separate(void)
|
|
{
|
|
void *fdt_blob = NULL;
|
|
|
|
if (IS_ENABLED(CONFIG_SANDBOX))
|
|
return NULL;
|
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
/* FDT is at end of BSS unless it is in a different memory region */
|
|
if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
|
|
fdt_blob = (ulong *)&_image_binary_end;
|
|
else
|
|
fdt_blob = (ulong *)&__bss_end;
|
|
#else
|
|
/* FDT is at end of image */
|
|
fdt_blob = (ulong *)&_end;
|
|
|
|
if (_DEBUG && !fdtdec_prepare_fdt(fdt_blob)) {
|
|
int stack_ptr;
|
|
const void *top = fdt_blob + fdt_totalsize(fdt_blob);
|
|
|
|
/*
|
|
* Perform a sanity check on the memory layout. If this fails,
|
|
* it indicates that the device tree is positioned above the
|
|
* global data pointer or the stack pointer. This should not
|
|
* happen.
|
|
*
|
|
* If this fails, check that SYS_INIT_SP_ADDR has enough space
|
|
* below it for SYS_MALLOC_F_LEN and global_data, as well as the
|
|
* stack, without overwriting the device tree or U-Boot itself.
|
|
* Since the device tree is sitting at _end (the start of the
|
|
* BSS region), we need the top of the device tree to be below
|
|
* any memory allocated by board_init_f_alloc_reserve().
|
|
*/
|
|
if (top > (void *)gd || top > (void *)&stack_ptr) {
|
|
printf("FDT %p gd %p\n", fdt_blob, gd);
|
|
panic("FDT overlap");
|
|
}
|
|
}
|
|
#endif
|
|
|
|
return fdt_blob;
|
|
}
|
|
|
|
int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
|
|
{
|
|
const char *path;
|
|
int offset, err;
|
|
|
|
if (!is_valid_ethaddr(mac))
|
|
return -EINVAL;
|
|
|
|
path = fdt_get_alias(fdt, "ethernet");
|
|
if (!path)
|
|
return 0;
|
|
|
|
debug("ethernet alias found: %s\n", path);
|
|
|
|
offset = fdt_path_offset(fdt, path);
|
|
if (offset < 0) {
|
|
debug("ethernet alias points to absent node %s\n", path);
|
|
return -ENOENT;
|
|
}
|
|
|
|
err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
debug("MAC address: %pM\n", mac);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int fdtdec_init_reserved_memory(void *blob)
|
|
{
|
|
int na, ns, node, err;
|
|
fdt32_t value;
|
|
|
|
/* inherit #address-cells and #size-cells from the root node */
|
|
na = fdt_address_cells(blob, 0);
|
|
ns = fdt_size_cells(blob, 0);
|
|
|
|
node = fdt_add_subnode(blob, 0, "reserved-memory");
|
|
if (node < 0)
|
|
return node;
|
|
|
|
err = fdt_setprop(blob, node, "ranges", NULL, 0);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
value = cpu_to_fdt32(ns);
|
|
|
|
err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
|
|
if (err < 0)
|
|
return err;
|
|
|
|
value = cpu_to_fdt32(na);
|
|
|
|
err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
|
|
if (err < 0)
|
|
return err;
|
|
|
|
return node;
|
|
}
|
|
|
|
int fdtdec_add_reserved_memory(void *blob, const char *basename,
|
|
const struct fdt_memory *carveout,
|
|
const char **compatibles, unsigned int count,
|
|
uint32_t *phandlep, unsigned long flags)
|
|
{
|
|
fdt32_t cells[4] = {}, *ptr = cells;
|
|
uint32_t upper, lower, phandle;
|
|
int parent, node, na, ns, err;
|
|
fdt_size_t size;
|
|
char name[64];
|
|
|
|
/* create an empty /reserved-memory node if one doesn't exist */
|
|
parent = fdt_path_offset(blob, "/reserved-memory");
|
|
if (parent < 0) {
|
|
parent = fdtdec_init_reserved_memory(blob);
|
|
if (parent < 0)
|
|
return parent;
|
|
}
|
|
|
|
/* only 1 or 2 #address-cells and #size-cells are supported */
|
|
na = fdt_address_cells(blob, parent);
|
|
if (na < 1 || na > 2)
|
|
return -FDT_ERR_BADNCELLS;
|
|
|
|
ns = fdt_size_cells(blob, parent);
|
|
if (ns < 1 || ns > 2)
|
|
return -FDT_ERR_BADNCELLS;
|
|
|
|
/* find a matching node and return the phandle to that */
|
|
fdt_for_each_subnode(node, blob, parent) {
|
|
const char *name = fdt_get_name(blob, node, NULL);
|
|
fdt_addr_t addr;
|
|
fdt_size_t size;
|
|
|
|
addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
|
|
&size, false);
|
|
if (addr == FDT_ADDR_T_NONE) {
|
|
debug("failed to read address/size for %s\n", name);
|
|
continue;
|
|
}
|
|
|
|
if (addr == carveout->start && (addr + size - 1) ==
|
|
carveout->end) {
|
|
if (phandlep)
|
|
*phandlep = fdt_get_phandle(blob, node);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Unpack the start address and generate the name of the new node
|
|
* base on the basename and the unit-address.
|
|
*/
|
|
upper = upper_32_bits(carveout->start);
|
|
lower = lower_32_bits(carveout->start);
|
|
|
|
if (na > 1 && upper > 0)
|
|
snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
|
|
lower);
|
|
else {
|
|
if (upper > 0) {
|
|
debug("address %08x:%08x exceeds addressable space\n",
|
|
upper, lower);
|
|
return -FDT_ERR_BADVALUE;
|
|
}
|
|
|
|
snprintf(name, sizeof(name), "%s@%x", basename, lower);
|
|
}
|
|
|
|
node = fdt_add_subnode(blob, parent, name);
|
|
if (node < 0)
|
|
return node;
|
|
|
|
if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
|
|
err = fdt_setprop(blob, node, "no-map", NULL, 0);
|
|
if (err < 0)
|
|
return err;
|
|
}
|
|
|
|
if (phandlep) {
|
|
err = fdt_generate_phandle(blob, &phandle);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
err = fdtdec_set_phandle(blob, node, phandle);
|
|
if (err < 0)
|
|
return err;
|
|
}
|
|
|
|
/* store one or two address cells */
|
|
if (na > 1)
|
|
*ptr++ = cpu_to_fdt32(upper);
|
|
|
|
*ptr++ = cpu_to_fdt32(lower);
|
|
|
|
/* store one or two size cells */
|
|
size = carveout->end - carveout->start + 1;
|
|
upper = upper_32_bits(size);
|
|
lower = lower_32_bits(size);
|
|
|
|
if (ns > 1)
|
|
*ptr++ = cpu_to_fdt32(upper);
|
|
|
|
*ptr++ = cpu_to_fdt32(lower);
|
|
|
|
err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
|
|
if (err < 0)
|
|
return err;
|
|
|
|
if (compatibles && count > 0) {
|
|
size_t length = 0, len = 0;
|
|
unsigned int i;
|
|
char *buffer;
|
|
|
|
for (i = 0; i < count; i++)
|
|
length += strlen(compatibles[i]) + 1;
|
|
|
|
buffer = malloc(length);
|
|
if (!buffer)
|
|
return -FDT_ERR_INTERNAL;
|
|
|
|
for (i = 0; i < count; i++)
|
|
len += strlcpy(buffer + len, compatibles[i],
|
|
length - len) + 1;
|
|
|
|
err = fdt_setprop(blob, node, "compatible", buffer, length);
|
|
free(buffer);
|
|
if (err < 0)
|
|
return err;
|
|
}
|
|
|
|
/* return the phandle for the new node for the caller to use */
|
|
if (phandlep)
|
|
*phandlep = phandle;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int fdtdec_get_carveout(const void *blob, const char *node,
|
|
const char *prop_name, unsigned int index,
|
|
struct fdt_memory *carveout, const char **name,
|
|
const char ***compatiblesp, unsigned int *countp,
|
|
unsigned long *flags)
|
|
{
|
|
const fdt32_t *prop;
|
|
uint32_t phandle;
|
|
int offset, len;
|
|
fdt_size_t size;
|
|
|
|
offset = fdt_path_offset(blob, node);
|
|
if (offset < 0)
|
|
return offset;
|
|
|
|
prop = fdt_getprop(blob, offset, prop_name, &len);
|
|
if (!prop) {
|
|
debug("failed to get %s for %s\n", prop_name, node);
|
|
return -FDT_ERR_NOTFOUND;
|
|
}
|
|
|
|
if ((len % sizeof(phandle)) != 0) {
|
|
debug("invalid phandle property\n");
|
|
return -FDT_ERR_BADPHANDLE;
|
|
}
|
|
|
|
if (len < (sizeof(phandle) * (index + 1))) {
|
|
debug("invalid phandle index\n");
|
|
return -FDT_ERR_NOTFOUND;
|
|
}
|
|
|
|
phandle = fdt32_to_cpu(prop[index]);
|
|
|
|
offset = fdt_node_offset_by_phandle(blob, phandle);
|
|
if (offset < 0) {
|
|
debug("failed to find node for phandle %u\n", phandle);
|
|
return offset;
|
|
}
|
|
|
|
if (name)
|
|
*name = fdt_get_name(blob, offset, NULL);
|
|
|
|
if (compatiblesp) {
|
|
const char **compatibles = NULL;
|
|
const char *start, *end, *ptr;
|
|
unsigned int count = 0;
|
|
|
|
prop = fdt_getprop(blob, offset, "compatible", &len);
|
|
if (!prop)
|
|
goto skip_compat;
|
|
|
|
start = ptr = (const char *)prop;
|
|
end = start + len;
|
|
|
|
while (ptr < end) {
|
|
ptr = strchrnul(ptr, '\0');
|
|
count++;
|
|
ptr++;
|
|
}
|
|
|
|
compatibles = malloc(sizeof(ptr) * count);
|
|
if (!compatibles)
|
|
return -FDT_ERR_INTERNAL;
|
|
|
|
ptr = start;
|
|
count = 0;
|
|
|
|
while (ptr < end) {
|
|
compatibles[count] = ptr;
|
|
ptr = strchrnul(ptr, '\0');
|
|
count++;
|
|
ptr++;
|
|
}
|
|
|
|
skip_compat:
|
|
*compatiblesp = compatibles;
|
|
|
|
if (countp)
|
|
*countp = count;
|
|
}
|
|
|
|
carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
|
|
"reg", 0, &size,
|
|
true);
|
|
if (carveout->start == FDT_ADDR_T_NONE) {
|
|
debug("failed to read address/size from \"reg\" property\n");
|
|
return -FDT_ERR_NOTFOUND;
|
|
}
|
|
|
|
carveout->end = carveout->start + size - 1;
|
|
|
|
if (flags) {
|
|
*flags = 0;
|
|
|
|
if (fdtdec_get_bool(blob, offset, "no-map"))
|
|
*flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
|
|
unsigned int index, const struct fdt_memory *carveout,
|
|
const char *name, const char **compatibles,
|
|
unsigned int count, unsigned long flags)
|
|
{
|
|
uint32_t phandle;
|
|
int err, offset, len;
|
|
fdt32_t value;
|
|
void *prop;
|
|
|
|
err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
|
|
count, &phandle, flags);
|
|
if (err < 0) {
|
|
debug("failed to add reserved memory: %d\n", err);
|
|
return err;
|
|
}
|
|
|
|
offset = fdt_path_offset(blob, node);
|
|
if (offset < 0) {
|
|
debug("failed to find offset for node %s: %d\n", node, offset);
|
|
return offset;
|
|
}
|
|
|
|
value = cpu_to_fdt32(phandle);
|
|
|
|
if (!fdt_getprop(blob, offset, prop_name, &len)) {
|
|
if (len == -FDT_ERR_NOTFOUND)
|
|
len = 0;
|
|
else
|
|
return len;
|
|
}
|
|
|
|
if ((index + 1) * sizeof(value) > len) {
|
|
err = fdt_setprop_placeholder(blob, offset, prop_name,
|
|
(index + 1) * sizeof(value),
|
|
&prop);
|
|
if (err < 0) {
|
|
debug("failed to resize reserved memory property: %s\n",
|
|
fdt_strerror(err));
|
|
return err;
|
|
}
|
|
}
|
|
|
|
err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
|
|
strlen(prop_name),
|
|
index * sizeof(value),
|
|
&value, sizeof(value));
|
|
if (err < 0) {
|
|
debug("failed to update %s property for node %s: %s\n",
|
|
prop_name, node, fdt_strerror(err));
|
|
return err;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* TODO(sjg@chromium.org): This function should not be weak */
|
|
__weak int fdtdec_board_setup(const void *fdt_blob)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* setup_multi_dtb_fit() - locate the correct dtb from a FIT
|
|
*
|
|
* This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
|
|
* supplied FIT
|
|
*
|
|
* It accepts the current value of gd->fdt_blob, which points to the FIT, then
|
|
* updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
|
|
* correct one
|
|
*/
|
|
static void setup_multi_dtb_fit(void)
|
|
{
|
|
void *blob;
|
|
|
|
/*
|
|
* Try and uncompress the blob.
|
|
* Unfortunately there is no way to know how big the input blob really
|
|
* is. So let us set the maximum input size arbitrarily high. 16MB
|
|
* ought to be more than enough for packed DTBs.
|
|
*/
|
|
if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0)
|
|
gd->fdt_blob = blob;
|
|
|
|
/*
|
|
* Check if blob is a FIT images containings DTBs.
|
|
* If so, pick the most relevant
|
|
*/
|
|
blob = locate_dtb_in_fit(gd->fdt_blob);
|
|
if (blob) {
|
|
gd_set_multi_dtb_fit(gd->fdt_blob);
|
|
gd->fdt_blob = blob;
|
|
gd->fdt_src = FDTSRC_FIT;
|
|
}
|
|
}
|
|
|
|
int fdtdec_setup(void)
|
|
{
|
|
int ret;
|
|
|
|
/* The devicetree is typically appended to U-Boot */
|
|
if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
|
|
gd->fdt_blob = fdt_find_separate();
|
|
gd->fdt_src = FDTSRC_SEPARATE;
|
|
} else { /* embed dtb in ELF file for testing / development */
|
|
gd->fdt_blob = dtb_dt_embedded();
|
|
gd->fdt_src = FDTSRC_EMBED;
|
|
}
|
|
|
|
/* Allow the board to override the fdt address. */
|
|
if (IS_ENABLED(CONFIG_OF_BOARD)) {
|
|
gd->fdt_blob = board_fdt_blob_setup(&ret);
|
|
if (ret)
|
|
return ret;
|
|
gd->fdt_src = FDTSRC_BOARD;
|
|
}
|
|
|
|
/* Allow the early environment to override the fdt address */
|
|
if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
|
|
ulong addr;
|
|
|
|
addr = env_get_hex("fdtcontroladdr", 0);
|
|
if (addr) {
|
|
gd->fdt_blob = map_sysmem(addr, 0);
|
|
gd->fdt_src = FDTSRC_ENV;
|
|
}
|
|
}
|
|
|
|
if (CONFIG_IS_ENABLED(MULTI_DTB_FIT))
|
|
setup_multi_dtb_fit();
|
|
|
|
ret = fdtdec_prepare_fdt(gd->fdt_blob);
|
|
if (!ret)
|
|
ret = fdtdec_board_setup(gd->fdt_blob);
|
|
oftree_reset();
|
|
|
|
return ret;
|
|
}
|
|
|
|
int fdtdec_resetup(int *rescan)
|
|
{
|
|
void *fdt_blob;
|
|
|
|
/*
|
|
* If the current DTB is part of a compressed FIT image,
|
|
* try to locate the best match from the uncompressed
|
|
* FIT image stillpresent there. Save the time and space
|
|
* required to uncompress it again.
|
|
*/
|
|
if (gd_multi_dtb_fit()) {
|
|
fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit());
|
|
|
|
if (fdt_blob == gd->fdt_blob) {
|
|
/*
|
|
* The best match did not change. no need to tear down
|
|
* the DM and rescan the fdt.
|
|
*/
|
|
*rescan = 0;
|
|
return 0;
|
|
}
|
|
|
|
*rescan = 1;
|
|
gd->fdt_blob = fdt_blob;
|
|
return fdtdec_prepare_fdt(fdt_blob);
|
|
}
|
|
|
|
/*
|
|
* If multi_dtb_fit is NULL, it means that blob appended to u-boot is
|
|
* not a FIT image containings DTB, but a single DTB. There is no need
|
|
* to teard down DM and rescan the DT in this case.
|
|
*/
|
|
*rescan = 0;
|
|
return 0;
|
|
}
|
|
|
|
int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
|
|
phys_addr_t *basep, phys_size_t *sizep,
|
|
struct bd_info *bd)
|
|
{
|
|
int addr_cells, size_cells;
|
|
const u32 *cell, *end;
|
|
u64 total_size, size, addr;
|
|
int node, child;
|
|
bool auto_size;
|
|
int bank;
|
|
int len;
|
|
|
|
debug("%s: board_id=%d\n", __func__, board_id);
|
|
if (!area)
|
|
area = "/memory";
|
|
node = fdt_path_offset(blob, area);
|
|
if (node < 0) {
|
|
debug("No %s node found\n", area);
|
|
return -ENOENT;
|
|
}
|
|
|
|
cell = fdt_getprop(blob, node, "reg", &len);
|
|
if (!cell) {
|
|
debug("No reg property found\n");
|
|
return -ENOENT;
|
|
}
|
|
|
|
addr_cells = fdt_address_cells(blob, node);
|
|
size_cells = fdt_size_cells(blob, node);
|
|
|
|
/* Check the board id and mask */
|
|
for (child = fdt_first_subnode(blob, node);
|
|
child >= 0;
|
|
child = fdt_next_subnode(blob, child)) {
|
|
int match_mask, match_value;
|
|
|
|
match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
|
|
match_value = fdtdec_get_int(blob, child, "match-value", -1);
|
|
|
|
if (match_value >= 0 &&
|
|
((board_id & match_mask) == match_value)) {
|
|
/* Found matching mask */
|
|
debug("Found matching mask %d\n", match_mask);
|
|
node = child;
|
|
cell = fdt_getprop(blob, node, "reg", &len);
|
|
if (!cell) {
|
|
debug("No memory-banks property found\n");
|
|
return -EINVAL;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
/* Note: if no matching subnode was found we use the parent node */
|
|
|
|
if (bd) {
|
|
memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
|
|
CONFIG_NR_DRAM_BANKS);
|
|
}
|
|
|
|
auto_size = fdtdec_get_bool(blob, node, "auto-size");
|
|
|
|
total_size = 0;
|
|
end = cell + len / 4 - addr_cells - size_cells;
|
|
debug("cell at %p, end %p\n", cell, end);
|
|
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
|
|
if (cell > end)
|
|
break;
|
|
addr = 0;
|
|
if (addr_cells == 2)
|
|
addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
|
|
addr += fdt32_to_cpu(*cell++);
|
|
if (bd)
|
|
bd->bi_dram[bank].start = addr;
|
|
if (basep && !bank)
|
|
*basep = (phys_addr_t)addr;
|
|
|
|
size = 0;
|
|
if (size_cells == 2)
|
|
size += (u64)fdt32_to_cpu(*cell++) << 32UL;
|
|
size += fdt32_to_cpu(*cell++);
|
|
|
|
if (auto_size) {
|
|
u64 new_size;
|
|
|
|
debug("Auto-sizing %llx, size %llx: ", addr, size);
|
|
new_size = get_ram_size((long *)(uintptr_t)addr, size);
|
|
if (new_size == size) {
|
|
debug("OK\n");
|
|
} else {
|
|
debug("sized to %llx\n", new_size);
|
|
size = new_size;
|
|
}
|
|
}
|
|
|
|
if (bd)
|
|
bd->bi_dram[bank].size = size;
|
|
total_size += size;
|
|
}
|
|
|
|
debug("Memory size %llu\n", total_size);
|
|
if (sizep)
|
|
*sizep = (phys_size_t)total_size;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#endif /* !USE_HOSTCC */
|