mirror of
https://github.com/AsahiLinux/u-boot
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60083261a1
The gdsys ControlCenter Digital board is based on a Marvell Armada 38x SOC. It boots from SPI-Flash but can be configured to boot from SD-card for factory programming and testing. On board peripherals include: - 2 x GbE - Xilinx Kintex-7 FPGA connected via PCIe - mSATA - USB3 host - Atmel TPM Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
516 lines
11 KiB
C
516 lines
11 KiB
C
/*
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* (C) Copyright 2013
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* Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <malloc.h>
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#include <fs.h>
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#include <i2c.h>
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#include <mmc.h>
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#include <tpm.h>
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#include <u-boot/sha1.h>
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#include <asm/byteorder.h>
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#include <asm/unaligned.h>
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#include <pca9698.h>
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#include "hre.h"
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/* other constants */
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enum {
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ESDHC_BOOT_IMAGE_SIG_OFS = 0x40,
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ESDHC_BOOT_IMAGE_SIZE_OFS = 0x48,
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ESDHC_BOOT_IMAGE_ADDR_OFS = 0x50,
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ESDHC_BOOT_IMAGE_TARGET_OFS = 0x58,
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ESDHC_BOOT_IMAGE_ENTRY_OFS = 0x60,
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};
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enum {
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I2C_SOC_0 = 0,
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I2C_SOC_1 = 1,
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};
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enum access_mode {
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HREG_NONE = 0,
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HREG_RD = 1,
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HREG_WR = 2,
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HREG_RDWR = 3,
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};
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/* register constants */
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enum {
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FIX_HREG_DEVICE_ID_HASH = 0,
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FIX_HREG_UNUSED1 = 1,
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FIX_HREG_UNUSED2 = 2,
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FIX_HREG_VENDOR = 3,
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COUNT_FIX_HREGS
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};
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static struct h_reg pcr_hregs[24];
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static struct h_reg fix_hregs[COUNT_FIX_HREGS];
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static struct h_reg var_hregs[8];
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/* hre opcodes */
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enum {
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/* opcodes w/o data */
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HRE_NOP = 0x00,
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HRE_SYNC = HRE_NOP,
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HRE_CHECK0 = 0x01,
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/* opcodes w/o data, w/ sync dst */
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/* opcodes w/ data */
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HRE_LOAD = 0x81,
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/* opcodes w/data, w/sync dst */
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HRE_XOR = 0xC1,
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HRE_AND = 0xC2,
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HRE_OR = 0xC3,
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HRE_EXTEND = 0xC4,
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HRE_LOADKEY = 0xC5,
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};
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/* hre errors */
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enum {
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HRE_E_OK = 0,
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HRE_E_TPM_FAILURE,
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HRE_E_INVALID_HREG,
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};
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static uint64_t device_id;
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static uint64_t device_cl;
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static uint64_t device_type;
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static uint32_t platform_key_handle;
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static uint32_t hre_tpm_err;
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static int hre_err = HRE_E_OK;
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#define IS_PCR_HREG(spec) ((spec) & 0x20)
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#define IS_FIX_HREG(spec) (((spec) & 0x38) == 0x08)
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#define IS_VAR_HREG(spec) (((spec) & 0x38) == 0x10)
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#define HREG_IDX(spec) ((spec) & (IS_PCR_HREG(spec) ? 0x1f : 0x7))
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static const uint8_t vendor[] = "Guntermann & Drunck";
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/**
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* @brief get the size of a given (TPM) NV area
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* @param index NV index of the area to get size for
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* @param size pointer to the size
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* @return 0 on success, != 0 on error
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*/
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static int get_tpm_nv_size(uint32_t index, uint32_t *size)
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{
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uint32_t err;
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uint8_t info[72];
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uint8_t *ptr;
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uint16_t v16;
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err = tpm_get_capability(TPM_CAP_NV_INDEX, index,
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info, sizeof(info));
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if (err) {
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printf("tpm_get_capability(CAP_NV_INDEX, %08x) failed: %u\n",
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index, err);
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return 1;
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}
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/* skip tag and nvIndex */
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ptr = info + 6;
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/* skip 2 pcr info fields */
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v16 = get_unaligned_be16(ptr);
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ptr += 2 + v16 + 1 + 20;
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v16 = get_unaligned_be16(ptr);
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ptr += 2 + v16 + 1 + 20;
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/* skip permission and flags */
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ptr += 6 + 3;
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*size = get_unaligned_be32(ptr);
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return 0;
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}
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/**
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* @brief search for a key by usage auth and pub key hash.
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* @param auth usage auth of the key to search for
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* @param pubkey_digest (SHA1) hash of the pub key structure of the key
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* @param[out] handle the handle of the key iff found
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* @return 0 if key was found in TPM; != 0 if not.
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*/
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static int find_key(const uint8_t auth[20], const uint8_t pubkey_digest[20],
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uint32_t *handle)
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{
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uint16_t key_count;
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uint32_t key_handles[10];
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uint8_t buf[288];
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uint8_t *ptr;
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uint32_t err;
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uint8_t digest[20];
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size_t buf_len;
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unsigned int i;
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/* fetch list of already loaded keys in the TPM */
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err = tpm_get_capability(TPM_CAP_HANDLE, TPM_RT_KEY, buf, sizeof(buf));
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if (err)
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return -1;
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key_count = get_unaligned_be16(buf);
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ptr = buf + 2;
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for (i = 0; i < key_count; ++i, ptr += 4)
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key_handles[i] = get_unaligned_be32(ptr);
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/* now search a(/ the) key which we can access with the given auth */
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for (i = 0; i < key_count; ++i) {
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buf_len = sizeof(buf);
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err = tpm_get_pub_key_oiap(key_handles[i], auth, buf, &buf_len);
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if (err && err != TPM_AUTHFAIL)
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return -1;
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if (err)
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continue;
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sha1_csum(buf, buf_len, digest);
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if (!memcmp(digest, pubkey_digest, 20)) {
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*handle = key_handles[i];
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return 0;
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}
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}
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return 1;
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}
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/**
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* @brief read CCDM common data from TPM NV
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* @return 0 if CCDM common data was found and read, !=0 if something failed.
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*/
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static int read_common_data(void)
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{
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uint32_t size = 0;
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uint32_t err;
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uint8_t buf[256];
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sha1_context ctx;
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if (get_tpm_nv_size(NV_COMMON_DATA_INDEX, &size) ||
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size < NV_COMMON_DATA_MIN_SIZE)
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return 1;
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err = tpm_nv_read_value(NV_COMMON_DATA_INDEX,
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buf, min(sizeof(buf), size));
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if (err) {
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printf("tpm_nv_read_value() failed: %u\n", err);
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return 1;
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}
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device_id = get_unaligned_be64(buf);
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device_cl = get_unaligned_be64(buf + 8);
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device_type = get_unaligned_be64(buf + 16);
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sha1_starts(&ctx);
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sha1_update(&ctx, buf, 24);
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sha1_finish(&ctx, fix_hregs[FIX_HREG_DEVICE_ID_HASH].digest);
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fix_hregs[FIX_HREG_DEVICE_ID_HASH].valid = true;
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platform_key_handle = get_unaligned_be32(buf + 24);
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return 0;
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}
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/**
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* @brief get pointer to hash register by specification
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* @param spec specification of a hash register
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* @return pointer to hash register or NULL if @a spec does not qualify a
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* valid hash register; NULL else.
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*/
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static struct h_reg *get_hreg(uint8_t spec)
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{
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uint8_t idx;
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idx = HREG_IDX(spec);
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if (IS_FIX_HREG(spec)) {
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if (idx < ARRAY_SIZE(fix_hregs))
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return fix_hregs + idx;
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hre_err = HRE_E_INVALID_HREG;
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} else if (IS_PCR_HREG(spec)) {
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if (idx < ARRAY_SIZE(pcr_hregs))
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return pcr_hregs + idx;
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hre_err = HRE_E_INVALID_HREG;
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} else if (IS_VAR_HREG(spec)) {
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if (idx < ARRAY_SIZE(var_hregs))
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return var_hregs + idx;
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hre_err = HRE_E_INVALID_HREG;
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}
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return NULL;
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}
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/**
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* @brief get pointer of a hash register by specification and usage.
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* @param spec specification of a hash register
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* @param mode access mode (read or write or read/write)
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* @return pointer to hash register if found and valid; NULL else.
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*
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* This func uses @a get_reg() to determine the hash register for a given spec.
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* If a register is found it is validated according to the desired access mode.
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* The value of automatic registers (PCR register and fixed registers) is
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* loaded or computed on read access.
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*/
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static struct h_reg *access_hreg(uint8_t spec, enum access_mode mode)
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{
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struct h_reg *result;
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result = get_hreg(spec);
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if (!result)
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return NULL;
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if (mode & HREG_WR) {
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if (IS_FIX_HREG(spec)) {
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hre_err = HRE_E_INVALID_HREG;
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return NULL;
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}
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}
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if (mode & HREG_RD) {
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if (!result->valid) {
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if (IS_PCR_HREG(spec)) {
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hre_tpm_err = tpm_pcr_read(HREG_IDX(spec),
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result->digest, 20);
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result->valid = (hre_tpm_err == TPM_SUCCESS);
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} else if (IS_FIX_HREG(spec)) {
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switch (HREG_IDX(spec)) {
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case FIX_HREG_DEVICE_ID_HASH:
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read_common_data();
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break;
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case FIX_HREG_VENDOR:
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memcpy(result->digest, vendor, 20);
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result->valid = true;
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break;
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}
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} else {
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result->valid = true;
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}
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}
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if (!result->valid) {
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hre_err = HRE_E_INVALID_HREG;
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return NULL;
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}
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}
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return result;
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}
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static void *compute_and(void *_dst, const void *_src, size_t n)
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{
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uint8_t *dst = _dst;
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const uint8_t *src = _src;
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size_t i;
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for (i = n; i-- > 0; )
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*dst++ &= *src++;
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return _dst;
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}
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static void *compute_or(void *_dst, const void *_src, size_t n)
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{
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uint8_t *dst = _dst;
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const uint8_t *src = _src;
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size_t i;
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for (i = n; i-- > 0; )
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*dst++ |= *src++;
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return _dst;
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}
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static void *compute_xor(void *_dst, const void *_src, size_t n)
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{
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uint8_t *dst = _dst;
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const uint8_t *src = _src;
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size_t i;
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for (i = n; i-- > 0; )
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*dst++ ^= *src++;
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return _dst;
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}
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static void *compute_extend(void *_dst, const void *_src, size_t n)
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{
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uint8_t digest[20];
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sha1_context ctx;
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sha1_starts(&ctx);
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sha1_update(&ctx, _dst, n);
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sha1_update(&ctx, _src, n);
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sha1_finish(&ctx, digest);
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memcpy(_dst, digest, min(n, sizeof(digest)));
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return _dst;
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}
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static int hre_op_loadkey(struct h_reg *src_reg, struct h_reg *dst_reg,
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const void *key, size_t key_size)
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{
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uint32_t parent_handle;
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uint32_t key_handle;
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if (!src_reg || !dst_reg || !src_reg->valid || !dst_reg->valid)
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return -1;
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if (find_key(src_reg->digest, dst_reg->digest, &parent_handle))
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return -1;
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hre_tpm_err = tpm_load_key2_oiap(parent_handle, key, key_size,
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src_reg->digest, &key_handle);
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if (hre_tpm_err) {
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hre_err = HRE_E_TPM_FAILURE;
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return -1;
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}
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return 0;
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}
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/**
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* @brief executes the next opcode on the hash register engine.
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* @param[in,out] ip pointer to the opcode (instruction pointer)
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* @param[in,out] code_size (remaining) size of the code
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* @return new instruction pointer on success, NULL on error.
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*/
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static const uint8_t *hre_execute_op(const uint8_t **ip, size_t *code_size)
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{
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bool dst_modified = false;
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uint32_t ins;
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uint8_t opcode;
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uint8_t src_spec;
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uint8_t dst_spec;
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uint16_t data_size;
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struct h_reg *src_reg, *dst_reg;
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uint8_t buf[20];
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const uint8_t *src_buf, *data;
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uint8_t *ptr;
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int i;
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void * (*bin_func)(void *, const void *, size_t);
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if (*code_size < 4)
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return NULL;
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ins = get_unaligned_be32(*ip);
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opcode = **ip;
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data = *ip + 4;
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src_spec = (ins >> 18) & 0x3f;
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dst_spec = (ins >> 12) & 0x3f;
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data_size = (ins & 0x7ff);
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debug("HRE: ins=%08x (op=%02x, s=%02x, d=%02x, L=%d)\n", ins,
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opcode, src_spec, dst_spec, data_size);
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if ((opcode & 0x80) && (data_size + 4) > *code_size)
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return NULL;
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src_reg = access_hreg(src_spec, HREG_RD);
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if (hre_err || hre_tpm_err)
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return NULL;
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dst_reg = access_hreg(dst_spec, (opcode & 0x40) ? HREG_RDWR : HREG_WR);
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if (hre_err || hre_tpm_err)
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return NULL;
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switch (opcode) {
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case HRE_NOP:
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goto end;
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case HRE_CHECK0:
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if (src_reg) {
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for (i = 0; i < 20; ++i) {
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if (src_reg->digest[i])
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return NULL;
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}
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}
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break;
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case HRE_LOAD:
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bin_func = memcpy;
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goto do_bin_func;
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case HRE_XOR:
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bin_func = compute_xor;
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goto do_bin_func;
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case HRE_AND:
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bin_func = compute_and;
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goto do_bin_func;
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case HRE_OR:
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bin_func = compute_or;
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goto do_bin_func;
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case HRE_EXTEND:
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bin_func = compute_extend;
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do_bin_func:
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if (!dst_reg)
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return NULL;
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if (src_reg) {
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src_buf = src_reg->digest;
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} else {
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if (!data_size) {
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memset(buf, 0, 20);
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src_buf = buf;
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} else if (data_size == 1) {
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memset(buf, *data, 20);
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src_buf = buf;
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} else if (data_size >= 20) {
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src_buf = data;
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} else {
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src_buf = buf;
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for (ptr = (uint8_t *)src_buf, i = 20; i > 0;
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i -= data_size, ptr += data_size)
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memcpy(ptr, data,
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min_t(size_t, i, data_size));
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}
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}
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bin_func(dst_reg->digest, src_buf, 20);
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dst_reg->valid = true;
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dst_modified = true;
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break;
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case HRE_LOADKEY:
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if (hre_op_loadkey(src_reg, dst_reg, data, data_size))
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return NULL;
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break;
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default:
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return NULL;
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}
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if (dst_reg && dst_modified && IS_PCR_HREG(dst_spec)) {
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hre_tpm_err = tpm_extend(HREG_IDX(dst_spec), dst_reg->digest,
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dst_reg->digest);
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if (hre_tpm_err) {
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hre_err = HRE_E_TPM_FAILURE;
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return NULL;
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}
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}
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end:
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*ip += 4;
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*code_size -= 4;
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if (opcode & 0x80) {
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*ip += data_size;
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*code_size -= data_size;
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}
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return *ip;
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}
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/**
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* @brief runs a program on the hash register engine.
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* @param code pointer to the (HRE) code.
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* @param code_size size of the code (in bytes).
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* @return 0 on success, != 0 on failure.
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*/
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int hre_run_program(const uint8_t *code, size_t code_size)
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{
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size_t code_left;
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const uint8_t *ip = code;
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code_left = code_size;
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hre_tpm_err = 0;
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hre_err = HRE_E_OK;
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while (code_left > 0)
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if (!hre_execute_op(&ip, &code_left))
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return -1;
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return hre_err;
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}
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int hre_verify_program(struct key_program *prg)
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{
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uint32_t crc;
|
|
|
|
crc = crc32(0, prg->code, prg->code_size);
|
|
|
|
if (crc != prg->code_crc) {
|
|
printf("HRC crc mismatch: %08x != %08x\n",
|
|
crc, prg->code_crc);
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|