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745df68d36
Introduce pinctrl for i.MX6
1. pinctrl-imx.c is for common usage. It's used by i.MX6/7.
2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry.
3. To the pinctrl_ops implementation, only set_state is implemented.
To i.MX6/7, the pinctrl dts entry is as following:
&iomuxc {
pinctrl-names = "default";
pinctrl_csi1: csi1grp {
fsl,pins = <
MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
>;
};
[.....]
};
there is no property named function or groups. So pinctrl_generic_set_state
can not be used here.
5. This driver is a simple implementation for i.mx iomux controller,
only parse the fsl,pins property and write value to registers.
6. With DEBUG enabled, we can see log when "i2c bus 0":
"
set_state_simple op missing
imx_pinctrl_set_state: i2c1grp
mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
write mux: offset 0x14c val 0x10
select_input: offset 0x5d8 val 0x1
write config: offset 0x3bc val 0x7f
mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
write mux: offset 0x148 val 0x10
select_input: offset 0x5d4 val 0x1
write config: offset 0x3b8 val 0x7f
"
this means imx6 pinctrl driver works as expected.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
/*
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* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DRIVERS_PINCTRL_IMX_H
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#define __DRIVERS_PINCTRL_IMX_H
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/**
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* @base: the address to the controller in virtual memory
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* @input_sel_base: the address of the select input in virtual memory.
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* @flags: flags specific for each soc
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*/
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struct imx_pinctrl_soc_info {
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void __iomem *base;
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void __iomem *input_sel_base;
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unsigned int flags;
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};
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/**
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* @dev: a pointer back to containing device
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* @info: the soc info
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*/
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struct imx_pinctrl_priv {
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struct udevice *dev;
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struct imx_pinctrl_soc_info *info;
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};
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extern const struct pinctrl_ops imx_pinctrl_ops;
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#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
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#define IMX_PAD_SION 0x40000000 /* set SION */
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/*
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* Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
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* 1 u32 CONFIG, so 24 types in total for each pin.
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*/
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#define FSL_PIN_SIZE 24
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#define SHARE_FSL_PIN_SIZE 20
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#define SHARE_MUX_CONF_REG 0x1
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#define ZERO_OFFSET_VALID 0x2
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#define IOMUXC_CONFIG_SION (0x1 << 4)
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int imx_pinctrl_probe(struct udevice *dev, struct imx_pinctrl_soc_info *info);
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int imx_pinctrl_remove(struct udevice *dev);
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#endif /* __DRIVERS_PINCTRL_IMX_H */
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