mirror of
https://github.com/AsahiLinux/u-boot
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119 lines
3 KiB
C
119 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* PCI auto-configuration library
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*
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* Author: Matt Porter <mporter@mvista.com>
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*
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* Copyright 2000 MontaVista Software Inc.
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*
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* Modifications for driver model:
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* Copyright 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <pci.h>
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void pciauto_region_init(struct pci_region *res)
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{
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/*
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* Avoid allocating PCI resources from address 0 -- this is illegal
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* according to PCI 2.1 and moreover, this is known to cause Linux IDE
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* drivers to fail. Use a reasonable starting value of 0x1000 instead
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* if the bus start address is below 0x1000.
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*/
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res->bus_lower = res->bus_start < 0x1000 ? 0x1000 : res->bus_start;
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}
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void pciauto_region_align(struct pci_region *res, pci_size_t size)
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{
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res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1;
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}
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int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
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pci_addr_t *bar, bool supports_64bit)
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{
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pci_addr_t addr;
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if (!res) {
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debug("No resource\n");
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goto error;
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}
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addr = ((res->bus_lower - 1) | (size - 1)) + 1;
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if (addr - res->bus_start + size > res->size) {
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debug("No room in resource, avail start=%llx / size=%llx, "
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"need=%llx\n", (unsigned long long)res->bus_lower,
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(unsigned long long)res->size, (unsigned long long)size);
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goto error;
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}
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if (upper_32_bits(addr) && !supports_64bit) {
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debug("Cannot assign 64-bit address to 32-bit-only resource\n");
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goto error;
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}
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res->bus_lower = addr + size;
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debug("address=0x%llx bus_lower=0x%llx\n", (unsigned long long)addr,
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(unsigned long long)res->bus_lower);
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*bar = addr;
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return 0;
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error:
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*bar = (pci_addr_t)-1;
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return -1;
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}
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static void pciauto_show_region(const char *name, struct pci_region *region)
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{
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pciauto_region_init(region);
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debug("PCI Autoconfig: Bus %s region: [%llx-%llx],\n"
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"\t\tPhysical Memory [%llx-%llxx]\n", name,
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(unsigned long long)region->bus_start,
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(unsigned long long)(region->bus_start + region->size - 1),
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(unsigned long long)region->phys_start,
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(unsigned long long)(region->phys_start + region->size - 1));
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}
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void pciauto_config_init(struct pci_controller *hose)
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{
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int i;
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hose->pci_io = NULL;
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hose->pci_mem = NULL;
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hose->pci_prefetch = NULL;
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for (i = 0; i < hose->region_count; i++) {
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switch (hose->regions[i].flags) {
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case PCI_REGION_IO:
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if (!hose->pci_io ||
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hose->pci_io->size < hose->regions[i].size)
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hose->pci_io = hose->regions + i;
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break;
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case PCI_REGION_MEM:
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if (!hose->pci_mem ||
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hose->pci_mem->size < hose->regions[i].size)
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hose->pci_mem = hose->regions + i;
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break;
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case (PCI_REGION_MEM | PCI_REGION_PREFETCH):
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if (!hose->pci_prefetch ||
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hose->pci_prefetch->size < hose->regions[i].size)
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hose->pci_prefetch = hose->regions + i;
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break;
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}
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}
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if (hose->pci_mem)
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pciauto_show_region("Memory", hose->pci_mem);
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if (hose->pci_prefetch)
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pciauto_show_region("Prefetchable Mem", hose->pci_prefetch);
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if (hose->pci_io)
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pciauto_show_region("I/O", hose->pci_io);
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}
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