u-boot/arch/arm/dts/rk3588s-u-boot.dtsi
Tom Rini 82b896c1d0 Revert "rockchip: Fix early use of bootph props"
While this change is correct for v2023.04 it is not correct for next
(where this is right now) nor post-v2023.04.

This reverts commit 8653e5d3b7.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-27 15:20:19 -04:00

71 lines
1.3 KiB
Text

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
*/
#include "rockchip-u-boot.dtsi"
/ {
dmc {
compatible = "rockchip,rk3588-dmc";
bootph-all;
status = "okay";
};
pmu1_grf: syscon@fd58a000 {
bootph-all;
compatible = "rockchip,rk3588-pmu1-grf", "syscon";
reg = <0x0 0xfd58a000 0x0 0x2000>;
};
sdmmc: mmc@fe2c0000 {
compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe2c0000 0x0 0x4000>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>,
<&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>;
clock-names = "ciu-drive", "ciu-sample", "biu", "ciu";
fifo-depth = <0x100>;
max-frequency = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
status = "disabled";
};
otp: nvmem@fecc0000 {
compatible = "rockchip,rk3588-otp";
reg = <0x0 0xfecc0000 0x0 0x400>;
#address-cells = <1>;
#size-cells = <1>;
status = "okay";
cpu_id: id@7 {
reg = <0x07 0x10>;
};
};
};
&xin24m {
bootph-all;
status = "okay";
};
&cru {
bootph-pre-ram;
status = "okay";
};
&sys_grf {
bootph-pre-ram;
status = "okay";
};
&uart2 {
clock-frequency = <24000000>;
bootph-pre-ram;
status = "okay";
};
&ioc {
bootph-pre-ram;
};