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https://github.com/AsahiLinux/u-boot
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159 lines
3.5 KiB
C
159 lines
3.5 KiB
C
/*
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* Freescale i.MX28 timer driver
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* Based on code from LTIB:
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* (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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/* Maximum fixed count */
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#if defined(CONFIG_MX23)
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#define TIMER_LOAD_VAL 0xffff
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#elif defined(CONFIG_MX28)
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#define TIMER_LOAD_VAL 0xffffffff
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#define timestamp (gd->arch.tbl)
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#define lastdec (gd->arch.lastinc)
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/*
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* This driver uses 1kHz clock source.
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*/
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#define MXS_INCREMENTER_HZ 1000
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static inline unsigned long tick_to_time(unsigned long tick)
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{
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return tick / (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
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}
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static inline unsigned long time_to_tick(unsigned long time)
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{
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return time * (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
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}
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/* Calculate how many ticks happen in "us" microseconds */
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static inline unsigned long us_to_tick(unsigned long us)
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{
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return (us * MXS_INCREMENTER_HZ) / 1000000;
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}
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int timer_init(void)
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{
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struct mxs_timrot_regs *timrot_regs =
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(struct mxs_timrot_regs *)MXS_TIMROT_BASE;
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/* Reset Timers and Rotary Encoder module */
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mxs_reset_block(&timrot_regs->hw_timrot_rotctrl_reg);
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/* Set fixed_count to 0 */
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#if defined(CONFIG_MX23)
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writel(0, &timrot_regs->hw_timrot_timcount0);
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#elif defined(CONFIG_MX28)
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writel(0, &timrot_regs->hw_timrot_fixed_count0);
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#endif
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/* Set UPDATE bit and 1Khz frequency */
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writel(TIMROT_TIMCTRLn_UPDATE | TIMROT_TIMCTRLn_RELOAD |
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TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL,
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&timrot_regs->hw_timrot_timctrl0);
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/* Set fixed_count to maximal value */
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#if defined(CONFIG_MX23)
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writel(TIMER_LOAD_VAL - 1, &timrot_regs->hw_timrot_timcount0);
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#elif defined(CONFIG_MX28)
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writel(TIMER_LOAD_VAL, &timrot_regs->hw_timrot_fixed_count0);
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#endif
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return 0;
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}
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unsigned long long get_ticks(void)
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{
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struct mxs_timrot_regs *timrot_regs =
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(struct mxs_timrot_regs *)MXS_TIMROT_BASE;
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uint32_t now;
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/* Current tick value */
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#if defined(CONFIG_MX23)
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/* Upper bits are the valid ones. */
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now = readl(&timrot_regs->hw_timrot_timcount0) >>
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TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET;
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#elif defined(CONFIG_MX28)
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now = readl(&timrot_regs->hw_timrot_running_count0);
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#endif
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if (lastdec >= now) {
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/*
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* normal mode (non roll)
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* move stamp forward with absolut diff ticks
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*/
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timestamp += (lastdec - now);
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} else {
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/* we have rollover of decrementer */
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timestamp += (TIMER_LOAD_VAL - now) + lastdec;
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}
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lastdec = now;
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return timestamp;
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}
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ulong get_timer_masked(void)
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{
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return tick_to_time(get_ticks());
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}
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ulong get_timer(ulong base)
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{
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return get_timer_masked() - base;
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}
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/* We use the HW_DIGCTL_MICROSECONDS register for sub-millisecond timer. */
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#define MXS_HW_DIGCTL_MICROSECONDS 0x8001c0c0
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void __udelay(unsigned long usec)
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{
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uint32_t old, new, incr;
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uint32_t counter = 0;
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old = readl(MXS_HW_DIGCTL_MICROSECONDS);
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while (counter < usec) {
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new = readl(MXS_HW_DIGCTL_MICROSECONDS);
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/* Check if the timer wrapped. */
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if (new < old) {
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incr = 0xffffffff - old;
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incr += new;
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} else {
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incr = new - old;
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}
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/*
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* Check if we are close to the maximum time and the counter
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* would wrap if incremented. If that's the case, break out
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* from the loop as the requested delay time passed.
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*/
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if (counter + incr < counter)
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break;
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counter += incr;
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old = new;
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}
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}
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ulong get_tbclk(void)
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{
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return MXS_INCREMENTER_HZ;
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}
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