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u-boot/arch/microblaze/cpu
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Ovidiu Panait d1114b8340 microblaze: exception: fix unaligned data access register mask 
The correct mask for getting the source/destination register from ESR in
the case of an unaligned access exception is 0x3E0. With this change, a
dummy unaligned store produces the expected info:
"""
>> swi r5, r0, 0x111

 ...
 Hardware exception at 0x111 address
 Unaligned data access exception
 Unaligned word access
 Unaligned store access
 Register R5
 Return address from exception 0x7f99dfc
 ### ERROR ### Please RESET the board ###
"""

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-6-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
..
cache.c common: Drop net.h from common header 2020-05-18 17:33:31 -04:00
exception.c microblaze: exception: fix unaligned data access register mask 2022-02-15 13:11:43 +01:00
interrupts.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
irq.S SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Makefile SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
spl.c microblaze: branch to base vector address on reset 2022-01-05 10:22:03 +01:00
start.S microblaze: start.S: add support for configurable vector base address 2022-01-05 10:22:03 +01:00
timer.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
u-boot-spl.lds microblaze: u-boot.lds: replace __end symbol with _end 2022-01-05 10:22:02 +01:00
u-boot.lds microblaze: u-boot.lds: replace __end symbol with _end 2022-01-05 10:22:02 +01:00