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051de9b3eb
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common to support new numbe of pins and remove any platform dependency from mscc-common. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
202 lines
4.4 KiB
C
202 lines
4.4 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Microsemi SoCs pinctrl driver
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*
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* Author: <alexandre.belloni@free-electrons.com>
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* Author: <gregory.clement@bootlin.com>
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* License: Dual MIT/GPL
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#include <asm/gpio.h>
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#include <asm/system.h>
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#include <common.h>
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#include <config.h>
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#include <dm.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include <dm/pinctrl.h>
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#include <dm/root.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <linux/io.h>
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#include "mscc-common.h"
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enum {
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FUNC_NONE,
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FUNC_GPIO,
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FUNC_IRQ0_IN,
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FUNC_IRQ0_OUT,
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FUNC_IRQ1_IN,
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FUNC_IRQ1_OUT,
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FUNC_MIIM1,
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FUNC_PCI_WAKE,
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FUNC_PTP0,
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FUNC_PTP1,
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FUNC_PTP2,
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FUNC_PTP3,
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FUNC_PWM,
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FUNC_RECO_CLK0,
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FUNC_RECO_CLK1,
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FUNC_SFP0,
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FUNC_SFP1,
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FUNC_SFP2,
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FUNC_SFP3,
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FUNC_SFP4,
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FUNC_SFP5,
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FUNC_SG0,
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FUNC_SI,
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FUNC_TACHO,
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FUNC_TWI,
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FUNC_TWI_SCL_M,
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FUNC_UART,
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FUNC_UART2,
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FUNC_MAX
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};
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static char * const ocelot_function_names[] = {
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[FUNC_NONE] = "none",
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[FUNC_GPIO] = "gpio",
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[FUNC_IRQ0_IN] = "irq0_in",
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[FUNC_IRQ0_OUT] = "irq0_out",
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[FUNC_IRQ1_IN] = "irq1_in",
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[FUNC_IRQ1_OUT] = "irq1_out",
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[FUNC_MIIM1] = "miim1",
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[FUNC_PCI_WAKE] = "pci_wake",
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[FUNC_PTP0] = "ptp0",
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[FUNC_PTP1] = "ptp1",
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[FUNC_PTP2] = "ptp2",
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[FUNC_PTP3] = "ptp3",
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[FUNC_PWM] = "pwm",
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[FUNC_RECO_CLK0] = "reco_clk0",
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[FUNC_RECO_CLK1] = "reco_clk1",
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[FUNC_SFP0] = "sfp0",
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[FUNC_SFP1] = "sfp1",
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[FUNC_SFP2] = "sfp2",
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[FUNC_SFP3] = "sfp3",
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[FUNC_SFP4] = "sfp4",
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[FUNC_SFP5] = "sfp5",
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[FUNC_SG0] = "sg0",
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[FUNC_SI] = "si",
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[FUNC_TACHO] = "tacho",
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[FUNC_TWI] = "twi",
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[FUNC_TWI_SCL_M] = "twi_scl_m",
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[FUNC_UART] = "uart",
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[FUNC_UART2] = "uart2",
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};
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MSCC_P(0, SG0, NONE, NONE);
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MSCC_P(1, SG0, NONE, NONE);
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MSCC_P(2, SG0, NONE, NONE);
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MSCC_P(3, SG0, NONE, NONE);
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MSCC_P(4, IRQ0_IN, IRQ0_OUT, TWI);
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MSCC_P(5, IRQ1_IN, IRQ1_OUT, PCI_WAKE);
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MSCC_P(6, UART, TWI_SCL_M, NONE);
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MSCC_P(7, UART, TWI_SCL_M, NONE);
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MSCC_P(8, SI, TWI_SCL_M, IRQ0_OUT);
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MSCC_P(9, SI, TWI_SCL_M, IRQ1_OUT);
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MSCC_P(10, PTP2, TWI_SCL_M, SFP0);
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MSCC_P(11, PTP3, TWI_SCL_M, SFP1);
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MSCC_P(12, UART2, TWI_SCL_M, SFP2);
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MSCC_P(13, UART2, TWI_SCL_M, SFP3);
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MSCC_P(14, MIIM1, TWI_SCL_M, SFP4);
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MSCC_P(15, MIIM1, TWI_SCL_M, SFP5);
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MSCC_P(16, TWI, NONE, SI);
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MSCC_P(17, TWI, TWI_SCL_M, SI);
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MSCC_P(18, PTP0, TWI_SCL_M, NONE);
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MSCC_P(19, PTP1, TWI_SCL_M, NONE);
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MSCC_P(20, RECO_CLK0, TACHO, NONE);
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MSCC_P(21, RECO_CLK1, PWM, NONE);
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#define OCELOT_PIN(n) { \
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.name = "GPIO_"#n, \
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.drv_data = &mscc_pin_##n \
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}
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static const struct mscc_pin_data ocelot_pins[] = {
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OCELOT_PIN(0),
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OCELOT_PIN(1),
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OCELOT_PIN(2),
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OCELOT_PIN(3),
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OCELOT_PIN(4),
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OCELOT_PIN(5),
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OCELOT_PIN(6),
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OCELOT_PIN(7),
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OCELOT_PIN(8),
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OCELOT_PIN(9),
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OCELOT_PIN(10),
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OCELOT_PIN(11),
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OCELOT_PIN(12),
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OCELOT_PIN(13),
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OCELOT_PIN(14),
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OCELOT_PIN(15),
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OCELOT_PIN(16),
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OCELOT_PIN(17),
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OCELOT_PIN(18),
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OCELOT_PIN(19),
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OCELOT_PIN(20),
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OCELOT_PIN(21),
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};
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static const unsigned long ocelot_gpios[] = {
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[MSCC_GPIO_OUT_SET] = 0x00,
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[MSCC_GPIO_OUT_CLR] = 0x04,
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[MSCC_GPIO_OUT] = 0x08,
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[MSCC_GPIO_IN] = 0x0c,
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[MSCC_GPIO_OE] = 0x10,
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[MSCC_GPIO_INTR] = 0x14,
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[MSCC_GPIO_INTR_ENA] = 0x18,
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[MSCC_GPIO_INTR_IDENT] = 0x1c,
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[MSCC_GPIO_ALT0] = 0x20,
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[MSCC_GPIO_ALT1] = 0x24,
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};
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static int ocelot_gpio_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv;
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uc_priv = dev_get_uclass_priv(dev);
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uc_priv->bank_name = "ocelot-gpio";
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uc_priv->gpio_count = ARRAY_SIZE(ocelot_pins);
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return 0;
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}
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static struct driver ocelot_gpio_driver = {
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.name = "ocelot-gpio",
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.id = UCLASS_GPIO,
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.probe = ocelot_gpio_probe,
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.ops = &mscc_gpio_ops,
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};
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int ocelot_pinctrl_probe(struct udevice *dev)
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{
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int ret;
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ret = mscc_pinctrl_probe(dev, FUNC_MAX, ocelot_pins,
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ARRAY_SIZE(ocelot_pins),
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ocelot_function_names,
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ocelot_gpios);
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if (ret)
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return ret;
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ret = device_bind(dev, &ocelot_gpio_driver, "ocelot-gpio", NULL,
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dev_of_offset(dev), NULL);
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return ret;
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}
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static const struct udevice_id ocelot_pinctrl_of_match[] = {
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{.compatible = "mscc,ocelot-pinctrl"},
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{},
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};
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U_BOOT_DRIVER(ocelot_pinctrl) = {
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.name = "ocelot-pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = of_match_ptr(ocelot_pinctrl_of_match),
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.probe = ocelot_pinctrl_probe,
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.priv_auto_alloc_size = sizeof(struct mscc_pinctrl),
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.ops = &mscc_pinctrl_ops,
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};
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