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https://github.com/AsahiLinux/u-boot
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b3acb6cd40
unify arm cache management except for non standard cache as ARM7TDMI Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
110 lines
2.9 KiB
C
110 lines
2.9 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* CPU specific code
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*/
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#include <common.h>
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#include <command.h>
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#include <clps7111.h>
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#include <asm/hardware.h>
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#include <asm/system.h>
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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static void cache_flush(void);
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#endif
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int cpu_init (void)
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{
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/*
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* setup up stacks if necessary
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*/
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#ifdef CONFIG_USE_IRQ
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IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
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FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
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#endif
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return 0;
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}
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int cleanup_before_linux (void)
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{
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/*
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* this function is called just before we call linux
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* it prepares the processor for linux
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*
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* we turn off caches etc ...
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* and we set the CPU-speed to 73 MHz - see start.S for details
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*/
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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disable_interrupts ();
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/* turn off I-cache */
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icache_disable();
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dcache_disable();
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/* flush I-cache */
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cache_flush();
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#ifdef CONFIG_ARM7_REVD
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/* go to high speed */
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IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
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#endif
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#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
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disable_interrupts ();
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/* Nothing more needed */
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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/* No cleanup before linux for IntegratorAP/CM720T as yet */
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#else
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#error No cleanup_before_linux() defined for this CPU type
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#endif
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return 0;
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}
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int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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disable_interrupts ();
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reset_cpu (0);
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/*NOTREACHED*/
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return (0);
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}
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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/* flush I/D-cache */
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static void cache_flush (void)
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{
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unsigned long i = 0;
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asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
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}
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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/* No specific cache setup for IntegratorAP/CM720T as yet */
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void icache_enable (void)
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{
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}
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#endif
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