mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
da2364cc14
This reverts commit ddb3ac3c71.
With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.
The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
613 lines
18 KiB
C
613 lines
18 KiB
C
/*
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* Copyright 2008,2010 Freescale Semiconductor, Inc
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* Andy Fleming
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*
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* Based (loosely) on the Linux code
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _MMC_H_
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#define _MMC_H_
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#include <linux/list.h>
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#include <linux/sizes.h>
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#include <linux/compiler.h>
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#include <part.h>
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/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
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#define SD_VERSION_SD (1U << 31)
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#define MMC_VERSION_MMC (1U << 30)
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#define MAKE_SDMMC_VERSION(a, b, c) \
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((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
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#define MAKE_SD_VERSION(a, b, c) \
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(SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
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#define MAKE_MMC_VERSION(a, b, c) \
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(MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
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#define EXTRACT_SDMMC_MAJOR_VERSION(x) \
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(((u32)(x) >> 16) & 0xff)
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#define EXTRACT_SDMMC_MINOR_VERSION(x) \
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(((u32)(x) >> 8) & 0xff)
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#define EXTRACT_SDMMC_CHANGE_VERSION(x) \
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((u32)(x) & 0xff)
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#define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
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#define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
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#define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
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#define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
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#define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
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#define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
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#define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
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#define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
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#define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
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#define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
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#define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
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#define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
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#define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
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#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
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#define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
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#define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
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#define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0)
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#define MMC_MODE_HS (1 << 0)
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#define MMC_MODE_HS_52MHz (1 << 1)
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#define MMC_MODE_4BIT (1 << 2)
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#define MMC_MODE_8BIT (1 << 3)
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#define MMC_MODE_SPI (1 << 4)
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#define MMC_MODE_DDR_52MHz (1 << 5)
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#define SD_DATA_4BIT 0x00040000
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#define IS_SD(x) ((x)->version & SD_VERSION_SD)
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#define IS_MMC(x) ((x)->version & MMC_VERSION_MMC)
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#define MMC_DATA_READ 1
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#define MMC_DATA_WRITE 2
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#define MMC_CMD_GO_IDLE_STATE 0
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#define MMC_CMD_SEND_OP_COND 1
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#define MMC_CMD_ALL_SEND_CID 2
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#define MMC_CMD_SET_RELATIVE_ADDR 3
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#define MMC_CMD_SET_DSR 4
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#define MMC_CMD_SWITCH 6
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#define MMC_CMD_SELECT_CARD 7
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#define MMC_CMD_SEND_EXT_CSD 8
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#define MMC_CMD_SEND_CSD 9
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#define MMC_CMD_SEND_CID 10
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#define MMC_CMD_STOP_TRANSMISSION 12
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#define MMC_CMD_SEND_STATUS 13
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#define MMC_CMD_SET_BLOCKLEN 16
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#define MMC_CMD_READ_SINGLE_BLOCK 17
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#define MMC_CMD_READ_MULTIPLE_BLOCK 18
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#define MMC_CMD_SET_BLOCK_COUNT 23
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#define MMC_CMD_WRITE_SINGLE_BLOCK 24
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#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
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#define MMC_CMD_ERASE_GROUP_START 35
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#define MMC_CMD_ERASE_GROUP_END 36
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#define MMC_CMD_ERASE 38
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#define MMC_CMD_APP_CMD 55
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#define MMC_CMD_SPI_READ_OCR 58
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#define MMC_CMD_SPI_CRC_ON_OFF 59
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#define MMC_CMD_RES_MAN 62
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#define MMC_CMD62_ARG1 0xefac62ec
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#define MMC_CMD62_ARG2 0xcbaea7
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#define SD_CMD_SEND_RELATIVE_ADDR 3
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#define SD_CMD_SWITCH_FUNC 6
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#define SD_CMD_SEND_IF_COND 8
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#define SD_CMD_SWITCH_UHS18V 11
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#define SD_CMD_APP_SET_BUS_WIDTH 6
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#define SD_CMD_APP_SD_STATUS 13
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#define SD_CMD_ERASE_WR_BLK_START 32
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#define SD_CMD_ERASE_WR_BLK_END 33
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#define SD_CMD_APP_SEND_OP_COND 41
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#define SD_CMD_APP_SEND_SCR 51
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/* SCR definitions in different words */
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#define SD_HIGHSPEED_BUSY 0x00020000
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#define SD_HIGHSPEED_SUPPORTED 0x00020000
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#define OCR_BUSY 0x80000000
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#define OCR_HCS 0x40000000
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#define OCR_VOLTAGE_MASK 0x007FFF80
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#define OCR_ACCESS_MODE 0x60000000
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#define MMC_ERASE_ARG 0x00000000
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#define MMC_SECURE_ERASE_ARG 0x80000000
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#define MMC_TRIM_ARG 0x00000001
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#define MMC_DISCARD_ARG 0x00000003
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#define MMC_SECURE_TRIM1_ARG 0x80000001
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#define MMC_SECURE_TRIM2_ARG 0x80008000
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#define MMC_STATUS_MASK (~0x0206BF7F)
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#define MMC_STATUS_SWITCH_ERROR (1 << 7)
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#define MMC_STATUS_RDY_FOR_DATA (1 << 8)
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#define MMC_STATUS_CURR_STATE (0xf << 9)
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#define MMC_STATUS_ERROR (1 << 19)
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#define MMC_STATE_PRG (7 << 9)
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#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
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#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
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#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
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#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
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#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
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#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
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#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
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#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
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#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
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#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
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#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
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#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
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#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
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#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
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#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
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#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
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#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
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#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
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#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
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addressed by index which are
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1 in value field */
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#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
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addressed by index, which are
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1 in value field */
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#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
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#define SD_SWITCH_CHECK 0
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#define SD_SWITCH_SWITCH 1
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/*
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* EXT_CSD fields
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*/
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#define EXT_CSD_ENH_START_ADDR 136 /* R/W */
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#define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
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#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
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#define EXT_CSD_PARTITION_SETTING 155 /* R/W */
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#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
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#define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
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#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
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#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
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#define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */
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#define EXT_CSD_WR_REL_PARAM 166 /* R */
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#define EXT_CSD_WR_REL_SET 167 /* R/W */
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#define EXT_CSD_RPMB_MULT 168 /* RO */
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#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
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#define EXT_CSD_BOOT_BUS_WIDTH 177
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#define EXT_CSD_PART_CONF 179 /* R/W */
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#define EXT_CSD_BUS_WIDTH 183 /* R/W */
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#define EXT_CSD_HS_TIMING 185 /* R/W */
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#define EXT_CSD_REV 192 /* RO */
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#define EXT_CSD_CARD_TYPE 196 /* RO */
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#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
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#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
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#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
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#define EXT_CSD_BOOT_MULT 226 /* RO */
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#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
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/*
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* EXT_CSD field definitions
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*/
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#define EXT_CSD_CMD_SET_NORMAL (1 << 0)
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#define EXT_CSD_CMD_SET_SECURE (1 << 1)
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#define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
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#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
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#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
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#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
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#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
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#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
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| EXT_CSD_CARD_TYPE_DDR_1_2V)
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
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#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
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#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
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#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
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#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
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#define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
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#define EXT_CSD_BOOT_ACK(x) (x << 6)
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#define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
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#define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
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#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
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#define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
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#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
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#define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
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#define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
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#define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
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#define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
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#define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
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#define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
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#define R1_ILLEGAL_COMMAND (1 << 22)
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#define R1_APP_CMD (1 << 5)
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#define MMC_RSP_PRESENT (1 << 0)
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#define MMC_RSP_136 (1 << 1) /* 136 bit response */
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#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
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#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
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#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
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#define MMC_RSP_NONE (0)
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#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
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MMC_RSP_BUSY)
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#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
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#define MMC_RSP_R3 (MMC_RSP_PRESENT)
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#define MMC_RSP_R4 (MMC_RSP_PRESENT)
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#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
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#define MMCPART_NOAVAILABLE (0xff)
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#define PART_ACCESS_MASK (0x7)
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#define PART_SUPPORT (0x1)
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#define ENHNCD_SUPPORT (0x2)
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#define PART_ENH_ATTRIB (0x1f)
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/* Maximum block size for MMC */
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#define MMC_MAX_BLOCK_LEN 512
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/* The number of MMC physical partitions. These consist of:
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* boot partitions (2), general purpose partitions (4) in MMC v4.4.
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*/
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#define MMC_NUM_BOOT_PARTITION 2
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#define MMC_PART_RPMB 3 /* RPMB partition number */
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/* Driver model support */
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/**
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* struct mmc_uclass_priv - Holds information about a device used by the uclass
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*/
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struct mmc_uclass_priv {
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struct mmc *mmc;
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};
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/**
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* mmc_get_mmc_dev() - get the MMC struct pointer for a device
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*
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* Provided that the device is already probed and ready for use, this value
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* will be available.
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*
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* @dev: Device
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* @return associated mmc struct pointer if available, else NULL
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*/
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struct mmc *mmc_get_mmc_dev(struct udevice *dev);
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/* End of driver model support */
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struct mmc_cid {
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unsigned long psn;
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unsigned short oid;
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unsigned char mid;
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unsigned char prv;
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unsigned char mdt;
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char pnm[7];
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};
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struct mmc_cmd {
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ushort cmdidx;
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uint resp_type;
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uint cmdarg;
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uint response[4];
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};
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struct mmc_data {
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union {
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char *dest;
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const char *src; /* src buffers don't get written to */
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};
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uint flags;
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uint blocks;
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uint blocksize;
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};
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/* forward decl. */
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struct mmc;
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#ifdef CONFIG_DM_MMC_OPS
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struct dm_mmc_ops {
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/**
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* send_cmd() - Send a command to the MMC device
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*
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* @dev: Device to receive the command
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* @cmd: Command to send
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* @data: Additional data to send/receive
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* @return 0 if OK, -ve on error
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*/
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int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data);
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/**
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* set_ios() - Set the I/O speed/width for an MMC device
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*
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* @dev: Device to update
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* @return 0 if OK, -ve on error
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*/
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int (*set_ios)(struct udevice *dev);
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/**
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* get_cd() - See whether a card is present
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*
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* @dev: Device to check
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* @return 0 if not present, 1 if present, -ve on error
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*/
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int (*get_cd)(struct udevice *dev);
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/**
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* get_wp() - See whether a card has write-protect enabled
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*
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* @dev: Device to check
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* @return 0 if write-enabled, 1 if write-protected, -ve on error
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*/
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int (*get_wp)(struct udevice *dev);
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};
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#define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
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int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data);
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int dm_mmc_set_ios(struct udevice *dev);
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int dm_mmc_get_cd(struct udevice *dev);
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int dm_mmc_get_wp(struct udevice *dev);
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/* Transition functions for compatibility */
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int mmc_set_ios(struct mmc *mmc);
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int mmc_getcd(struct mmc *mmc);
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int mmc_getwp(struct mmc *mmc);
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#else
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struct mmc_ops {
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int (*send_cmd)(struct mmc *mmc,
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struct mmc_cmd *cmd, struct mmc_data *data);
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int (*set_ios)(struct mmc *mmc);
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int (*init)(struct mmc *mmc);
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int (*getcd)(struct mmc *mmc);
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int (*getwp)(struct mmc *mmc);
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};
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#endif
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struct mmc_config {
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const char *name;
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#ifndef CONFIG_DM_MMC_OPS
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const struct mmc_ops *ops;
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#endif
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uint host_caps;
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uint voltages;
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uint f_min;
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uint f_max;
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uint b_max;
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unsigned char part_type;
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};
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struct sd_ssr {
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unsigned int au; /* In sectors */
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unsigned int erase_timeout; /* In milliseconds */
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unsigned int erase_offset; /* In milliseconds */
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};
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/*
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* With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
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* with mmc_get_mmc_dev().
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*
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* TODO struct mmc should be in mmc_private but it's hard to fix right now
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|
*/
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struct mmc {
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#ifndef CONFIG_BLK
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struct list_head link;
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#endif
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const struct mmc_config *cfg; /* provided configuration */
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uint version;
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void *priv;
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uint has_init;
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int high_capacity;
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uint bus_width;
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uint clock;
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|
uint card_caps;
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|
uint ocr;
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|
uint dsr;
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uint dsr_imp;
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uint scr[2];
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|
uint csd[4];
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|
uint cid[4];
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|
ushort rca;
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u8 part_support;
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|
u8 part_attr;
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|
u8 wr_rel_set;
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|
u8 part_config;
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|
uint tran_speed;
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|
uint read_bl_len;
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|
uint write_bl_len;
|
|
uint erase_grp_size; /* in 512-byte sectors */
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|
uint hc_wp_grp_size; /* in 512-byte sectors */
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|
struct sd_ssr ssr; /* SD status register */
|
|
u64 capacity;
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|
u64 capacity_user;
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u64 capacity_boot;
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|
u64 capacity_rpmb;
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|
u64 capacity_gp[4];
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|
u64 enh_user_start;
|
|
u64 enh_user_size;
|
|
#ifndef CONFIG_BLK
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|
struct blk_desc block_dev;
|
|
#endif
|
|
char op_cond_pending; /* 1 if we are waiting on an op_cond command */
|
|
char init_in_progress; /* 1 if we have done mmc_start_init() */
|
|
char preinit; /* start init as early as possible */
|
|
int ddr_mode;
|
|
#ifdef CONFIG_DM_MMC
|
|
struct udevice *dev; /* Device for this MMC controller */
|
|
#endif
|
|
};
|
|
|
|
struct mmc_hwpart_conf {
|
|
struct {
|
|
uint enh_start; /* in 512-byte sectors */
|
|
uint enh_size; /* in 512-byte sectors, if 0 no enh area */
|
|
unsigned wr_rel_change : 1;
|
|
unsigned wr_rel_set : 1;
|
|
} user;
|
|
struct {
|
|
uint size; /* in 512-byte sectors */
|
|
unsigned enhanced : 1;
|
|
unsigned wr_rel_change : 1;
|
|
unsigned wr_rel_set : 1;
|
|
} gp_part[4];
|
|
};
|
|
|
|
enum mmc_hwpart_conf_mode {
|
|
MMC_HWPART_CONF_CHECK,
|
|
MMC_HWPART_CONF_SET,
|
|
MMC_HWPART_CONF_COMPLETE,
|
|
};
|
|
|
|
struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
|
|
|
|
/**
|
|
* mmc_bind() - Set up a new MMC device ready for probing
|
|
*
|
|
* A child block device is bound with the IF_TYPE_MMC interface type. This
|
|
* allows the device to be used with CONFIG_BLK
|
|
*
|
|
* @dev: MMC device to set up
|
|
* @mmc: MMC struct
|
|
* @cfg: MMC configuration
|
|
* @return 0 if OK, -ve on error
|
|
*/
|
|
int mmc_bind(struct udevice *dev, struct mmc *mmc,
|
|
const struct mmc_config *cfg);
|
|
void mmc_destroy(struct mmc *mmc);
|
|
|
|
/**
|
|
* mmc_unbind() - Unbind a MMC device's child block device
|
|
*
|
|
* @dev: MMC device
|
|
* @return 0 if OK, -ve on error
|
|
*/
|
|
int mmc_unbind(struct udevice *dev);
|
|
int mmc_initialize(bd_t *bis);
|
|
int mmc_init(struct mmc *mmc);
|
|
int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
|
|
void mmc_set_clock(struct mmc *mmc, uint clock);
|
|
struct mmc *find_mmc_device(int dev_num);
|
|
int mmc_set_dev(int dev_num);
|
|
void print_mmc_devices(char separator);
|
|
|
|
/**
|
|
* get_mmc_num() - get the total MMC device number
|
|
*
|
|
* @return 0 if there is no MMC device, else the number of devices
|
|
*/
|
|
int get_mmc_num(void);
|
|
int mmc_switch_part(struct mmc *mmc, unsigned int part_num);
|
|
int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
|
|
enum mmc_hwpart_conf_mode mode);
|
|
|
|
#ifndef CONFIG_DM_MMC_OPS
|
|
int mmc_getcd(struct mmc *mmc);
|
|
int board_mmc_getcd(struct mmc *mmc);
|
|
int mmc_getwp(struct mmc *mmc);
|
|
int board_mmc_getwp(struct mmc *mmc);
|
|
#endif
|
|
|
|
int mmc_set_dsr(struct mmc *mmc, u16 val);
|
|
/* Function to change the size of boot partition and rpmb partitions */
|
|
int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
|
|
unsigned long rpmbsize);
|
|
/* Function to modify the PARTITION_CONFIG field of EXT_CSD */
|
|
int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access);
|
|
/* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
|
|
int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode);
|
|
/* Function to modify the RST_n_FUNCTION field of EXT_CSD */
|
|
int mmc_set_rst_n_function(struct mmc *mmc, u8 enable);
|
|
/* Functions to read / write the RPMB partition */
|
|
int mmc_rpmb_set_key(struct mmc *mmc, void *key);
|
|
int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter);
|
|
int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
|
|
unsigned short cnt, unsigned char *key);
|
|
int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
|
|
unsigned short cnt, unsigned char *key);
|
|
#ifdef CONFIG_CMD_BKOPS_ENABLE
|
|
int mmc_set_bkops_enable(struct mmc *mmc);
|
|
#endif
|
|
|
|
/**
|
|
* Start device initialization and return immediately; it does not block on
|
|
* polling OCR (operation condition register) status. Then you should call
|
|
* mmc_init, which would block on polling OCR status and complete the device
|
|
* initializatin.
|
|
*
|
|
* @param mmc Pointer to a MMC device struct
|
|
* @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
|
|
*/
|
|
int mmc_start_init(struct mmc *mmc);
|
|
|
|
/**
|
|
* Set preinit flag of mmc device.
|
|
*
|
|
* This will cause the device to be pre-inited during mmc_initialize(),
|
|
* which may save boot time if the device is not accessed until later.
|
|
* Some eMMC devices take 200-300ms to init, but unfortunately they
|
|
* must be sent a series of commands to even get them to start preparing
|
|
* for operation.
|
|
*
|
|
* @param mmc Pointer to a MMC device struct
|
|
* @param preinit preinit flag value
|
|
*/
|
|
void mmc_set_preinit(struct mmc *mmc, int preinit);
|
|
|
|
#ifdef CONFIG_MMC_SPI
|
|
#define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI)
|
|
#else
|
|
#define mmc_host_is_spi(mmc) 0
|
|
#endif
|
|
struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
|
|
|
|
void board_mmc_power_init(void);
|
|
int board_mmc_init(bd_t *bis);
|
|
int cpu_mmc_init(bd_t *bis);
|
|
int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
|
|
int mmc_get_env_dev(void);
|
|
|
|
struct pci_device_id;
|
|
|
|
/**
|
|
* pci_mmc_init() - set up PCI MMC devices
|
|
*
|
|
* This finds all the matching PCI IDs and sets them up as MMC devices.
|
|
*
|
|
* @name: Name to use for devices
|
|
* @mmc_supported: PCI IDs to search for, terminated by {0, 0}
|
|
*/
|
|
int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported);
|
|
|
|
/* Set block count limit because of 16 bit register limit on some hardware*/
|
|
#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
|
|
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
|
|
#endif
|
|
|
|
/**
|
|
* mmc_get_blk_desc() - Get the block descriptor for an MMC device
|
|
*
|
|
* @mmc: MMC device
|
|
* @return block device if found, else NULL
|
|
*/
|
|
struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
|
|
|
|
#endif /* _MMC_H_ */
|