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ef11df6b66
On ADS5121 when booting linux the following errors are seen:
Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND
Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND
Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND
This is caused by ft_cpu_setup trying to deal with
both old and new soc node naming. This patch
fixes this by being smarter about what to
fixup.
Also do soc node fixups by compatible instead of by path.
A new board config called OF_SOC_COMPAT defined
to be "fsl,mpc5121-immr" replaces the old
OF_SOC node path that was defined to be "soc@80000000".
Old device trees still work, but the compatiblity
is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
which is on by default in include/configs/ads5121.h.
Signed-off-by: John Rigby <jrigby@freescale.com>
199 lines
4.3 KiB
C
199 lines
4.3 KiB
C
/*
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* Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
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* (C) Copyright 2007 DENX Software Engineering
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* CPU specific code for the MPC512x family.
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*
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* Derived from the MPC83xx code.
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*/
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#include <common.h>
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#include <command.h>
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#include <mpc512x.h>
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#include <asm/processor.h>
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#if defined(CONFIG_OF_LIBFDT)
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#include <fdt_support.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int checkcpu (void)
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{
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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ulong clock = gd->cpu_clk;
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u32 pvr = get_pvr ();
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u32 spridr = immr->sysconf.spridr;
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char buf[32];
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puts ("CPU: ");
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switch (spridr & 0xffff0000) {
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case SPR_5121E:
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puts ("MPC5121e ");
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break;
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default:
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printf ("Unknown part ID %08x ", spridr & 0xffff0000);
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}
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printf ("rev. %d.%d, Core ", SVR_MJREV (spridr), SVR_MNREV (spridr));
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switch (pvr & 0xffff0000) {
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case PVR_E300C4:
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puts ("e300c4 ");
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break;
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default:
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puts ("unknown ");
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}
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printf ("at %s MHz, CSB at %3d MHz\n", strmhz(buf, clock),
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gd->csb_clk / 1000000);
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return 0;
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}
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int
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do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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{
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ulong msr;
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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/* Interrupts and MMU off */
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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msr &= ~( MSR_EE | MSR_IR | MSR_DR);
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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/*
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* Enable Reset Control Reg - "RSTE" is the magic word that let us go
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*/
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immap->reset.rpr = 0x52535445;
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/* Verify Reset Control Reg is enabled */
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while (!((immap->reset.rcer) & RCER_CRE))
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;
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printf ("Resetting the board.\n");
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udelay(200);
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/* Perform reset */
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immap->reset.rcr = RCR_SWHR;
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/* Unreached... */
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return 1;
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}
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/*
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* Get timebase clock frequency (like cpu_clk in Hz)
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*/
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unsigned long get_tbclk (void)
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{
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ulong tbclk;
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tbclk = (gd->bus_clk + 3L) / 4L;
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return tbclk;
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}
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#if defined(CONFIG_WATCHDOG)
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void watchdog_reset (void)
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{
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int re_enable = disable_interrupts ();
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/* Reset watchdog */
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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immr->wdt.swsrr = 0x556c;
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immr->wdt.swsrr = 0xaa39;
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if (re_enable)
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enable_interrupts ();
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}
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#endif
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#ifdef CONFIG_OF_LIBFDT
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#ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
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/*
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* fdt setup for old device trees
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* fix up
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* cpu clocks
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* soc clocks
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* ethernet addresses
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*/
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static void old_ft_cpu_setup(void *blob, bd_t *bd)
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{
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/*
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* avoid fixing up by path because that
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* produces scary error messages
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*/
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/*
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* old device trees have ethernet nodes with
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* device_type = "network"
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*/
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do_fixup_by_prop(blob, "device_type", "network", 8,
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"local-mac-address", bd->bi_enetaddr, 6, 0);
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do_fixup_by_prop(blob, "device_type", "network", 8,
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"address", bd->bi_enetaddr, 6, 0);
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/*
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* old device trees have soc nodes with
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* device_type = "soc"
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*/
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do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
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"bus-frequency", bd->bi_ipsfreq, 0);
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}
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#endif
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static void ft_clock_setup(void *blob, bd_t *bd)
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{
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int node;
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char *cpu_path = "/cpus/" OF_CPU;
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const char *path = NULL;
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/*
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* fixup cpu clocks using path
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*/
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do_fixup_by_path_u32(blob, cpu_path,
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"timebase-frequency", OF_TBCLK, 1);
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do_fixup_by_path_u32(blob, cpu_path,
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"bus-frequency", bd->bi_busfreq, 1);
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do_fixup_by_path_u32(blob, cpu_path,
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"clock-frequency", bd->bi_intfreq, 1);
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/*
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* fixup soc clocks using compatible
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*/
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do_fixup_by_compat_u32(blob, OF_SOC_COMPAT,
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"bus-frequency", bd->bi_ipsfreq, 1);
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}
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
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old_ft_cpu_setup(blob, bd);
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#endif
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ft_clock_setup(blob, bd);
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#ifdef CONFIG_HAS_ETH0
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fdt_fixup_ethernet(blob, bd);
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#endif
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}
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#endif
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