mirror of
https://github.com/AsahiLinux/u-boot
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2712f08898
This contains just the minimum information for a coreboot-based board. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
24 lines
393 B
Text
24 lines
393 B
Text
/dts-v1/;
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/include/ "coreboot.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "Google Link";
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compatible = "google,link", "intel,celeron-ivybridge";
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config {
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silent_console = <0>;
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};
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gpio: gpio {};
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serial {
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reg = <0x3f8 8>;
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clock-frequency = <115200>;
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};
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chosen { };
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memory { device_type = "memory"; reg = <0 0>; };
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};
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