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231 lines
5.8 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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.. sectionauthor:: Udit Kumar <u-kumar1@ti.com>
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J7200 Platforms
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===============
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Introduction:
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-------------
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The J7200 family of SoCs are part of K3 Multicore SoC architecture platform
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targeting automotive applications. They are designed as a low power, high
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performance and highly integrated device architecture, adding significant
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enhancement on processing power, graphics capability, video and imaging
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processing, virtualization and coherent memory support.
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The device is partitioned into three functional domains, each containing
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specific processing cores and peripherals:
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1. Wake-up (WKUP) domain:
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* Device Management and Security Controller (DMSC)
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2. Microcontroller (MCU) domain:
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* Dual Core ARM Cortex-R5F processor
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3. MAIN domain:
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* Dual core 64-bit ARM Cortex-A72
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More info can be found in TRM: https://www.ti.com/lit/pdf/spruiu1
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Platform information:
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* https://www.ti.com/tool/J7200XSOMXEVM
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Boot Flow:
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----------
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Below is the pictorial representation of boot flow:
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.. image:: img/boot_diagram_k3_current.svg
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:alt: Boot flow diagram
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- Here DMSC acts as master and provides all the critical services. R5/A72
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requests DMSC to get these services done as shown in the above diagram.
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Sources:
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--------
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_boot_sources
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:end-before: .. k3_rst_include_end_boot_sources
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Build procedure:
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----------------
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0. Setup the environment variables:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_common_env_vars_desc
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:end-before: .. k3_rst_include_end_common_env_vars_desc
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_board_env_vars_desc
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:end-before: .. k3_rst_include_end_board_env_vars_desc
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Set the variables corresponding to this platform:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_common_env_vars_defn
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:end-before: .. k3_rst_include_end_common_env_vars_defn
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.. code-block:: bash
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$ export UBOOT_CFG_CORTEXR=j7200_evm_r5_defconfig
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$ export UBOOT_CFG_CORTEXA=j7200_evm_a72_defconfig
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$ export TFA_BOARD=generic
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$ # we dont use any extra TFA parameters
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$ unset TFA_EXTRA_ARGS
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$ export OPTEE_PLATFORM=k3-j721e
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$ # we dont use any extra OP-TEE parameters
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$ unset OPTEE_EXTRA_ARGS
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.. j7200_evm_rst_include_start_build_steps
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1. Trusted Firmware-A:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_tfa
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:end-before: .. k3_rst_include_end_build_steps_tfa
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2. OP-TEE:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_optee
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:end-before: .. k3_rst_include_end_build_steps_optee
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3. U-Boot:
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* 3.1 R5:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_spl_r5
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:end-before: .. k3_rst_include_end_build_steps_spl_r5
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* 3.2 A72:
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_build_steps_uboot
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:end-before: .. k3_rst_include_end_build_steps_uboot
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.. j7200_evm_rst_include_end_build_steps
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Target Images
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-------------
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In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
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variant (GP, HS-FS, HS-SE) requires a different source for these files.
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- GP
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* tiboot3-j7200-gp-evm.bin from step 3.1
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* tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
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- HS-FS
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* tiboot3-j7200_sr2-hs-fs-evm.bin from step 3.1
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* tispl.bin, u-boot.img from step 3.2
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- HS-SE
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* tiboot3-j7200_sr2-hs-evm.bin from step 3.1
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* tispl.bin, u-boot.img from step 3.2
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Image formats:
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--------------
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- tiboot3.bin
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.. image:: img/j7200_tiboot3.bin.svg
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:alt: tiboot3.bin image format
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- tispl.bin
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.. image:: img/dm_tispl.bin.svg
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:alt: tispl.bin image format
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Switch Setting for Boot Mode
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----------------------------
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Boot Mode pins provide means to select the boot mode and options before the
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device is powered up. After every POR, they are the main source to populate
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the Boot Parameter Tables.
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The following table shows some common boot modes used on J7200 platform. More
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details can be found in the Technical Reference Manual:
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https://www.ti.com/lit/pdf/spruiu1 under the `Boot Mode Pins` section.
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.. list-table:: Boot Modes
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:widths: 16 16 16
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:header-rows: 1
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* - Switch Label
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- SW9: 12345678
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- SW8: 12345678
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* - SD
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- 00000000
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- 10000010
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* - EMMC
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- 01000000
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- 10000000
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* - OSPI
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- 01000000
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- 00000110
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* - UART
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- 01110000
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- 00000000
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* - USB DFU
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- 00100000
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- 10000000
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For SW8 and SW9, the switch state in the "ON" position = 1.
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eMMC:
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-----
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ROM supports booting from eMMC raw read or UDA FS mode.
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Below is memory layout in case of booting from
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boot 0/1 partition in raw mode.
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Current allocated size for tiboot3 size is 1MB, tispl is 2MB.
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Size of u-boot.img is taken 4MB for refernece,
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But this is subject to change depending upon atf, optee size
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.. image:: img/emmc_j7200_evm_boot01.svg
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:alt: Traditional eMMC boot partition layout
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In case of UDA FS mode booting, following is layout.
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All boot images tiboot3.bin, tispl and u-boot should be written to
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fat formatted UDA FS as file.
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.. image:: img/emmc_j7200_evm_udafs.svg
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:alt: eMMC UDA boot partition layout
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In case of booting from eMMC, write above images into raw or UDA FS.
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and set mmc partconf accordingly.
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Debugging U-Boot
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----------------
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See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
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detailed setup information.
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.. warning::
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**OpenOCD support since**: v0.12.0
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If the default package version of OpenOCD in your development
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environment's distribution needs to be updated, it might be necessary to
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build OpenOCD from the source.
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.. include:: k3.rst
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:start-after: .. k3_rst_include_start_openocd_connect_XDS110
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:end-before: .. k3_rst_include_end_openocd_connect_XDS110
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To start OpenOCD and connect to the board
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.. code-block:: bash
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openocd -f board/ti_j7200evm.cfg
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