Tom Warren 722e000ccd Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. ... Added PLL variables (dividers mask/shift, lock enable/detect, etc.) to new pllinfo struct for each Soc/PLL. PLLA/C/D/E/M/P/U/X. Used pllinfo struct in all clock functions, validated on T210. Should be equivalent to prior code on T124/114/30/20. Thanks to Marcel Ziswiler for corrections to the T20/T30 values. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>		2015-08-05 15:22:51 -07:00
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clock.c	Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.	2015-08-05 15:22:51 -07:00
cpu.c	ARM: tegra: collect SoC sources into mach-tegra	2015-02-21 08:23:51 -05:00
funcmux.c	ARM: tegra: collect SoC sources into mach-tegra	2015-02-21 08:23:51 -05:00
Kconfig	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
Makefile	ARM: tegra: collect SoC sources into mach-tegra	2015-02-21 08:23:51 -05:00
pinmux.c	ARM: tegra: collect SoC sources into mach-tegra	2015-02-21 08:23:51 -05:00