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732f01aabf
Add pinctrl driver for StarFive JH7110 SoC. Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Tested-by: Conor Dooley <conor.dooley@microchip.com>
55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Pinctrl / GPIO driver for StarFive SoC
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*
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* Copyright (C) 2022 Shanghai StarFive Technology Co., Ltd.
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* Author: Lee Kuan Lim <kuanlim.lee@starfivetech.com>
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* Author: Jianlong Huang <jianlong.huang@starfivetech.com>
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*/
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#define STARFIVE_PINCTRL(a, b) { .number = a, .name = b }
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extern const struct pinctrl_ops starfive_pinctrl_ops;
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struct starfive_pinctrl_pin {
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unsigned int number;
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const char *name;
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};
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struct starfive_pinctrl_soc_info {
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/* pinctrl */
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int (*set_one_pinmux)(struct udevice *dev, unsigned int pin,
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unsigned int din, u32 dout, u32 doen, u32 func);
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int (*get_padcfg_base)(struct udevice *dev,
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unsigned int pin);
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/* gpio dout/doen/din/gpioinput register */
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unsigned int dout_reg_base;
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unsigned int dout_mask;
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unsigned int doen_reg_base;
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unsigned int doen_mask;
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unsigned int gpi_reg_base;
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unsigned int gpi_mask;
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unsigned int gpioin_reg_base;
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/* gpio */
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const char *gpio_bank_name;
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int ngpios;
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void (*gpio_init_hw)(struct udevice *dev);
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};
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/*
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* struct starfive_pinctrl_priv - private data for Starfive pinctrl driver
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*
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* @padctl_base: base address of the pinctrl device
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* @info: SoC specific data & function
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*/
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struct starfive_pinctrl_priv {
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void __iomem *base;
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struct starfive_pinctrl_soc_info *info;
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};
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void starfive_set_gpiomux(struct udevice *dev, unsigned int pin,
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unsigned int din, u32 dout, u32 doen);
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int starfive_pinctrl_probe(struct udevice *dev,
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const struct starfive_pinctrl_soc_info *info);
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